System.py revision 9408
12330SN/A# Copyright (c) 2005-2007 The Regents of The University of Michigan 22330SN/A# Copyright (c) 2011 Regents of the University of California 32330SN/A# All rights reserved. 42330SN/A# 52330SN/A# Redistribution and use in source and binary forms, with or without 62330SN/A# modification, are permitted provided that the following conditions are 72330SN/A# met: redistributions of source code must retain the above copyright 82330SN/A# notice, this list of conditions and the following disclaimer; 92330SN/A# redistributions in binary form must reproduce the above copyright 102330SN/A# notice, this list of conditions and the following disclaimer in the 112330SN/A# documentation and/or other materials provided with the distribution; 122330SN/A# neither the name of the copyright holders nor the names of its 132330SN/A# contributors may be used to endorse or promote products derived from 142330SN/A# this software without specific prior written permission. 152330SN/A# 162330SN/A# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172330SN/A# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182330SN/A# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192330SN/A# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202330SN/A# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212330SN/A# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222330SN/A# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232330SN/A# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242330SN/A# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252330SN/A# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262330SN/A# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272689Sktlim@umich.edu# 282689Sktlim@umich.edu# Authors: Nathan Binkert 292330SN/A# Rick Strong 302292SN/A 312292SN/Afrom m5.SimObject import SimObject 322292SN/Afrom m5.defines import buildEnv 332292SN/Afrom m5.params import * 342980Sgblack@eecs.umich.edufrom m5.proxy import * 356658Snate@binkert.org 368229Snate@binkert.orgfrom SimpleMemory import * 372362SN/A 382680Sktlim@umich.educlass MemoryMode(Enum): vals = ['invalid', 'atomic', 'timing'] 392683Sktlim@umich.edu 402683Sktlim@umich.educlass System(MemObject): 412678Sktlim@umich.edu type = 'System' 422292SN/A cxx_header = "sim/system.hh" 432292SN/A system_port = MasterPort("System port") 442292SN/A 453548Sgblack@eecs.umich.edu # Override the clock from the ClockedObject which looks at the 463548Sgblack@eecs.umich.edu # parent clock by default. The 1 GHz default system clock serves 473548Sgblack@eecs.umich.edu # as a start for the modules that rely on the parent to provide 483548Sgblack@eecs.umich.edu # the clock. 492330SN/A clock = '1GHz' 502292SN/A 512862Sktlim@umich.edu @classmethod 522862Sktlim@umich.edu def export_method_cxx_predecls(cls, code): 532330SN/A code('#include "sim/system.hh"') 542330SN/A 552330SN/A @classmethod 562330SN/A def export_methods(cls, code): 572330SN/A code(''' 582330SN/A Enums::MemoryMode getMemoryMode(); 592292SN/A void setMemoryMode(Enums::MemoryMode mode); 602683Sktlim@umich.edu''') 612683Sktlim@umich.edu 626331Sgblack@eecs.umich.edu memories = VectorParam.AbstractMemory(Self.all, 632683Sktlim@umich.edu "All memories in the system") 648735Sandreas.hanson@arm.com mem_mode = Param.MemoryMode('atomic', "The mode the memory system is in") 653486Sktlim@umich.edu 662862Sktlim@umich.edu # The memory ranges are to be populated when creating the system 672862Sktlim@umich.edu # such that these can be passed from the I/O subsystem through an 682862Sktlim@umich.edu # I/O bridge or cache 692862Sktlim@umich.edu mem_ranges = VectorParam.AddrRange([], "Ranges that constitute main memory") 705712Shsul@eecs.umich.edu 712683Sktlim@umich.edu work_item_id = Param.Int(-1, "specific work item id") 725714Shsul@eecs.umich.edu num_work_ids = Param.Int(16, "Number of distinct work item types") 735714Shsul@eecs.umich.edu work_begin_cpu_id_exit = Param.Int(-1, 745714Shsul@eecs.umich.edu "work started on specific id, now exit simulation") 755714Shsul@eecs.umich.edu work_begin_ckpt_count = Param.Counter(0, 766221Snate@binkert.org "create checkpoint when work items begin count value is reached") 772683Sktlim@umich.edu work_begin_exit_count = Param.Counter(0, 786221Snate@binkert.org "exit simulation when work items begin count value is reached") 792683Sktlim@umich.edu work_end_ckpt_count = Param.Counter(0, 802683Sktlim@umich.edu "create checkpoint when work items end count value is reached") 812683Sktlim@umich.edu work_end_exit_count = Param.Counter(0, 822683Sktlim@umich.edu "exit simulation when work items end count value is reached") 832683Sktlim@umich.edu work_cpus_ckpt_count = Param.Counter(0, 848706Sandreas.hansson@arm.com "create checkpoint when active cpu count value is reached") 858706Sandreas.hansson@arm.com 868706Sandreas.hansson@arm.com init_param = Param.UInt64(0, "numerical value to pass into simulator") 878706Sandreas.hansson@arm.com boot_osflags = Param.String("a", "boot flags to pass to the kernel") 888706Sandreas.hansson@arm.com kernel = Param.String("", "file that contains the kernel code") 898706Sandreas.hansson@arm.com readfile = Param.String("", "file to read startup script from") 908706Sandreas.hansson@arm.com symbolfile = Param.String("", "file to get the symbols from") 913675Sktlim@umich.edu load_addr_mask = Param.UInt64(0xffffffffff, 922683Sktlim@umich.edu "Address to mask loading binaries with"); 932683Sktlim@umich.edu