System.py revision 11270
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284486Sbinkertn@umich.edu# Authors: Nathan Binkert
297897Shestness@cs.utexas.edu#          Rick Strong
304486Sbinkertn@umich.edu
313102SN/Afrom m5.SimObject import SimObject
326654Snate@binkert.orgfrom m5.defines import buildEnv
333102SN/Afrom m5.params import *
343102SN/Afrom m5.proxy import *
356654Snate@binkert.org
3610249Sstephan.diestelhorst@arm.comfrom DVFSHandler import *
378931Sandreas.hansson@arm.comfrom SimpleMemory import *
382212SN/A
399524SAndreas.Sandberg@ARM.comclass MemoryMode(Enum): vals = ['invalid', 'atomic', 'timing',
409524SAndreas.Sandberg@ARM.com                                'atomic_noncaching']
412902SN/A
428703Sandreas.hansson@arm.comclass System(MemObject):
431783SN/A    type = 'System'
449338SAndreas.Sandberg@arm.com    cxx_header = "sim/system.hh"
458839Sandreas.hansson@arm.com    system_port = MasterPort("System port")
467673Snate@binkert.org
477673Snate@binkert.org    @classmethod
488597Ssteve.reinhardt@amd.com    def export_method_cxx_predecls(cls, code):
498597Ssteve.reinhardt@amd.com        code('#include "sim/system.hh"')
508597Ssteve.reinhardt@amd.com
518597Ssteve.reinhardt@amd.com    @classmethod
528597Ssteve.reinhardt@amd.com    def export_methods(cls, code):
538597Ssteve.reinhardt@amd.com        code('''
549524SAndreas.Sandberg@ARM.com      Enums::MemoryMode getMemoryMode() const;
558597Ssteve.reinhardt@amd.com      void setMemoryMode(Enums::MemoryMode mode);
568597Ssteve.reinhardt@amd.com''')
574859Snate@binkert.org
588931Sandreas.hansson@arm.com    memories = VectorParam.AbstractMemory(Self.all,
598931Sandreas.hansson@arm.com                                          "All memories in the system")
602902SN/A    mem_mode = Param.MemoryMode('atomic', "The mode the memory system is in")
619408Sandreas.hansson@arm.com
6210700Sandreas.hansson@arm.com    # When reserving memory on the host, we have the option of
6310700Sandreas.hansson@arm.com    # reserving swap space or not (by passing MAP_NORESERVE to
6410700Sandreas.hansson@arm.com    # mmap). By enabling this flag, we accomodate cases where a large
6510700Sandreas.hansson@arm.com    # (but sparse) memory is simulated.
6610700Sandreas.hansson@arm.com    mmap_using_noreserve = Param.Bool(False, "mmap the backing store " \
6710700Sandreas.hansson@arm.com                                          "without reserving swap")
6810700Sandreas.hansson@arm.com
699408Sandreas.hansson@arm.com    # The memory ranges are to be populated when creating the system
709408Sandreas.hansson@arm.com    # such that these can be passed from the I/O subsystem through an
719408Sandreas.hansson@arm.com    # I/O bridge or cache
729408Sandreas.hansson@arm.com    mem_ranges = VectorParam.AddrRange([], "Ranges that constitute main memory")
739408Sandreas.hansson@arm.com
749814Sandreas.hansson@arm.com    cache_line_size = Param.Unsigned(64, "Cache line size in bytes")
759814Sandreas.hansson@arm.com
7611270Sandreas.sandberg@arm.com    exit_on_work_items = Param.Bool(True, "Exit from the simulation loop when "
7711270Sandreas.sandberg@arm.com                                    "encountering work item annotations.")
787914SBrad.Beckmann@amd.com    work_item_id = Param.Int(-1, "specific work item id")
798666SPrakash.Ramrakhyani@arm.com    num_work_ids = Param.Int(16, "Number of distinct work item types")
807914SBrad.Beckmann@amd.com    work_begin_cpu_id_exit = Param.Int(-1,
817914SBrad.Beckmann@amd.com        "work started on specific id, now exit simulation")
827914SBrad.Beckmann@amd.com    work_begin_ckpt_count = Param.Counter(0,
837914SBrad.Beckmann@amd.com        "create checkpoint when work items begin count value is reached")
847914SBrad.Beckmann@amd.com    work_begin_exit_count = Param.Counter(0,
857914SBrad.Beckmann@amd.com        "exit simulation when work items begin count value is reached")
867914SBrad.Beckmann@amd.com    work_end_ckpt_count = Param.Counter(0,
877914SBrad.Beckmann@amd.com        "create checkpoint when work items end count value is reached")
887914SBrad.Beckmann@amd.com    work_end_exit_count = Param.Counter(0,
897914SBrad.Beckmann@amd.com        "exit simulation when work items end count value is reached")
907914SBrad.Beckmann@amd.com    work_cpus_ckpt_count = Param.Counter(0,
917914SBrad.Beckmann@amd.com        "create checkpoint when active cpu count value is reached")
927914SBrad.Beckmann@amd.com
938769Sgblack@eecs.umich.edu    init_param = Param.UInt64(0, "numerical value to pass into simulator")
948769Sgblack@eecs.umich.edu    boot_osflags = Param.String("a", "boot flags to pass to the kernel")
958769Sgblack@eecs.umich.edu    kernel = Param.String("", "file that contains the kernel code")
9610282Sdam.sunwoo@arm.com    kernel_addr_check = Param.Bool(True,
9710282Sdam.sunwoo@arm.com        "whether to address check on kernel (disable for baremetal)")
988769Sgblack@eecs.umich.edu    readfile = Param.String("", "file to read startup script from")
998769Sgblack@eecs.umich.edu    symbolfile = Param.String("", "file to get the symbols from")
1008769Sgblack@eecs.umich.edu    load_addr_mask = Param.UInt64(0xffffffffff,
10110037SARM gem5 Developers            "Address to mask loading binaries with")
10210037SARM gem5 Developers    load_offset = Param.UInt64(0, "Address to offset loading binaries with")
10310249Sstephan.diestelhorst@arm.com
10411146Smitch.hayenga@arm.com    multi_thread = Param.Bool(False,
10511146Smitch.hayenga@arm.com            "Supports multi-threaded CPUs? Impacts Thread/Context IDs")
10611146Smitch.hayenga@arm.com
10710249Sstephan.diestelhorst@arm.com    # Dynamic voltage and frequency handler for the system, disabled by default
10810249Sstephan.diestelhorst@arm.com    # Provide list of domains that need to be controlled by the handler
10910249Sstephan.diestelhorst@arm.com    dvfs_handler = DVFSHandler()
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