SConscript revision 13894:8603648c1679 
1# -*- mode:python -*-
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright
9# notice, this list of conditions and the following disclaimer;
10# redistributions in binary form must reproduce the above copyright
11# notice, this list of conditions and the following disclaimer in the
12# documentation and/or other materials provided with the distribution;
13# neither the name of the copyright holders nor the names of its
14# contributors may be used to endorse or promote products derived from
15# this software without specific prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28#
29# Authors: Nathan Binkert
30
31Import('*')
32
33SimObject('ClockedObject.py')
34SimObject('TickedObject.py')
35SimObject('Root.py')
36SimObject('ClockDomain.py')
37SimObject('VoltageDomain.py')
38SimObject('System.py')
39SimObject('DVFSHandler.py')
40SimObject('SubSystem.py')
41SimObject('RedirectPath.py')
42
43Source('arguments.cc')
44Source('async.cc')
45Source('backtrace_%s.cc' % env['BACKTRACE_IMPL'])
46Source('core.cc')
47Source('tags.cc')
48Source('cxx_config.cc')
49Source('cxx_manager.cc')
50Source('cxx_config_ini.cc')
51Source('debug.cc')
52Source('py_interact.cc', add_tags='python')
53Source('eventq.cc')
54Source('global_event.cc')
55Source('init.cc', add_tags='python')
56Source('init_signals.cc')
57Source('main.cc', tags='main')
58Source('port.cc')
59Source('python.cc', add_tags='python')
60Source('redirect_path.cc')
61Source('root.cc')
62Source('serialize.cc')
63Source('drain.cc')
64Source('sim_events.cc')
65Source('sim_object.cc')
66Source('sub_system.cc')
67Source('ticked_object.cc')
68Source('simulate.cc')
69Source('stat_control.cc')
70Source('stat_register.cc', add_tags='python')
71Source('clock_domain.cc')
72Source('voltage_domain.cc')
73Source('se_signal.cc')
74Source('linear_solver.cc')
75Source('system.cc')
76Source('dvfs_handler.cc')
77Source('clocked_object.cc')
78Source('mathexpr.cc')
79
80if env['TARGET_ISA'] != 'null':
81    SimObject('InstTracer.py')
82    SimObject('Process.py')
83    Source('faults.cc')
84    Source('process.cc')
85    Source('fd_array.cc')
86    Source('fd_entry.cc')
87    Source('pseudo_inst.cc')
88    Source('syscall_emul.cc')
89    Source('syscall_desc.cc')
90
91if env['TARGET_ISA'] != 'x86':
92    Source('microcode_rom.cc')
93
94DebugFlag('Checkpoint')
95DebugFlag('Config')
96DebugFlag('CxxConfig')
97DebugFlag('Drain')
98DebugFlag('Event')
99DebugFlag('Fault')
100DebugFlag('Flow')
101DebugFlag('IPI')
102DebugFlag('IPR')
103DebugFlag('Interrupt')
104DebugFlag('Loader')
105DebugFlag('PseudoInst')
106DebugFlag('Stack')
107DebugFlag('SyscallBase')
108DebugFlag('SyscallVerbose')
109DebugFlag('TimeSync')
110DebugFlag('Thread')
111DebugFlag('Timer')
112DebugFlag('VtoPhys')
113DebugFlag('WorkItems')
114DebugFlag('ClockDomain')
115DebugFlag('VoltageDomain')
116DebugFlag('DVFS')
117
118CompoundFlag('SyscallAll', [ 'SyscallBase', 'SyscallVerbose'])
119