SConscript revision 11909:71fb1f21e9d6 
1# -*- mode:python -*-
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright
9# notice, this list of conditions and the following disclaimer;
10# redistributions in binary form must reproduce the above copyright
11# notice, this list of conditions and the following disclaimer in the
12# documentation and/or other materials provided with the distribution;
13# neither the name of the copyright holders nor the names of its
14# contributors may be used to endorse or promote products derived from
15# this software without specific prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28#
29# Authors: Nathan Binkert
30
31Import('*')
32
33SimObject('ClockedObject.py')
34SimObject('TickedObject.py')
35SimObject('Root.py')
36SimObject('ClockDomain.py')
37SimObject('VoltageDomain.py')
38SimObject('System.py')
39SimObject('DVFSHandler.py')
40SimObject('SubSystem.py')
41
42Source('arguments.cc')
43Source('async.cc')
44Source('backtrace_%s.cc' % env['BACKTRACE_IMPL'])
45Source('core.cc')
46Source('tags.cc')
47Source('cxx_config.cc')
48Source('cxx_manager.cc')
49Source('cxx_config_ini.cc')
50Source('debug.cc')
51Source('py_interact.cc', skip_no_python=True)
52Source('eventq.cc')
53Source('global_event.cc')
54Source('init.cc', skip_no_python=True)
55Source('init_signals.cc')
56Source('main.cc', main=True, skip_lib=True)
57Source('root.cc')
58Source('serialize.cc')
59Source('drain.cc')
60Source('sim_events.cc')
61Source('sim_object.cc')
62Source('sub_system.cc')
63Source('ticked_object.cc')
64Source('simulate.cc')
65Source('stat_control.cc')
66Source('stat_register.cc', skip_no_python=True)
67Source('clock_domain.cc')
68Source('voltage_domain.cc')
69Source('se_signal.cc')
70Source('linear_solver.cc')
71Source('system.cc')
72Source('dvfs_handler.cc')
73Source('clocked_object.cc')
74Source('mathexpr.cc')
75
76if env['TARGET_ISA'] != 'null':
77    SimObject('InstTracer.py')
78    SimObject('Process.py')
79    Source('aux_vector.cc')
80    Source('faults.cc')
81    Source('process.cc')
82    Source('fd_array.cc')
83    Source('fd_entry.cc')
84    Source('pseudo_inst.cc')
85    Source('syscall_emul.cc')
86    Source('syscall_desc.cc')
87
88if env['TARGET_ISA'] != 'x86':
89    Source('microcode_rom.cc')
90
91DebugFlag('Checkpoint')
92DebugFlag('Config')
93DebugFlag('CxxConfig')
94DebugFlag('Drain')
95DebugFlag('Event')
96DebugFlag('Fault')
97DebugFlag('Flow')
98DebugFlag('IPI')
99DebugFlag('IPR')
100DebugFlag('Interrupt')
101DebugFlag('Loader')
102DebugFlag('PseudoInst')
103DebugFlag('Stack')
104DebugFlag('SyscallBase')
105DebugFlag('SyscallVerbose')
106DebugFlag('TimeSync')
107DebugFlag('Thread')
108DebugFlag('Timer')
109DebugFlag('VtoPhys')
110DebugFlag('WorkItems')
111DebugFlag('ClockDomain')
112DebugFlag('VoltageDomain')
113DebugFlag('DVFS')
114
115CompoundFlag('SyscallAll', [ 'SyscallBase', 'SyscallVerbose'])
116