SConscript revision 7624 
1# -*- mode:python -*-
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright
9# notice, this list of conditions and the following disclaimer;
10# redistributions in binary form must reproduce the above copyright
11# notice, this list of conditions and the following disclaimer in the
12# documentation and/or other materials provided with the distribution;
13# neither the name of the copyright holders nor the names of its
14# contributors may be used to endorse or promote products derived from
15# this software without specific prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28#
29# Authors: Nathan Binkert
30
31Import('*')
32
33SimObject('BaseTLB.py')
34SimObject('Root.py')
35SimObject('System.py')
36SimObject('InstTracer.py')
37
38Source('async.cc')
39Source('core.cc')
40Source('debug.cc')
41Source('eventq.cc')
42Source('faults.cc')
43Source('init.cc')
44Source('main.cc', bin_only=True)
45Source('pseudo_inst.cc')
46Source('root.cc')
47Source('serialize.cc')
48Source('sim_events.cc')
49Source('sim_object.cc')
50Source('simulate.cc')
51Source('stat_control.cc')
52Source('system.cc')
53
54if env['FULL_SYSTEM']:
55    Source('arguments.cc')
56else:
57    Source('tlb.cc')
58    SimObject('Process.py')
59
60    Source('process.cc')
61    Source('syscall_emul.cc')
62
63TraceFlag('Config')
64TraceFlag('Event')
65TraceFlag('Fault')
66TraceFlag('Flow')
67TraceFlag('IPI')
68TraceFlag('IPR')
69TraceFlag('Interrupt')
70TraceFlag('Loader')
71TraceFlag('Stack')
72TraceFlag('SyscallVerbose')
73TraceFlag('TLB')
74TraceFlag('Thread')
75TraceFlag('Timer')
76TraceFlag('VtoPhys')
77