SConscript revision 5944 
111384Ssteve.reinhardt@amd.com# -*- mode:python -*-
211384Ssteve.reinhardt@amd.com
38464SN/A# Copyright (c) 2006 The Regents of The University of Michigan
48464SN/A# All rights reserved.
57860SN/A#
611384Ssteve.reinhardt@amd.com# Redistribution and use in source and binary forms, with or without
711384Ssteve.reinhardt@amd.com# modification, are permitted provided that the following conditions are
811384Ssteve.reinhardt@amd.com# met: redistributions of source code must retain the above copyright
911384Ssteve.reinhardt@amd.com# notice, this list of conditions and the following disclaimer;
1010798Ssteve.reinhardt@amd.com# redistributions in binary form must reproduce the above copyright
1110798Ssteve.reinhardt@amd.com# notice, this list of conditions and the following disclaimer in the
1210798Ssteve.reinhardt@amd.com# documentation and/or other materials provided with the distribution;
137860SN/A# neither the name of the copyright holders nor the names of its
147860SN/A# contributors may be used to endorse or promote products derived from
157860SN/A# this software without specific prior written permission.
167860SN/A#
177860SN/A# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
187860SN/A# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
197860SN/A# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
207860SN/A# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
217860SN/A# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
227860SN/A# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
237860SN/A# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
247860SN/A# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
257860SN/A# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
267860SN/A# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
277860SN/A# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
287860SN/A#
2911384Ssteve.reinhardt@amd.com# Authors: Nathan Binkert
30
31Import('*')
32
33SimObject('BaseTLB.py')
34SimObject('Root.py')
35SimObject('System.py')
36SimObject('InstTracer.py')
37
38Source('async.cc')
39Source('core.cc')
40Source('debug.cc')
41Source('eventq.cc')
42Source('faults.cc')
43Source('init.cc')
44BinSource('main.cc')
45Source('pseudo_inst.cc')
46Source('root.cc')
47Source('serialize.cc')
48Source('sim_events.cc')
49Source('sim_object.cc')
50Source('simulate.cc')
51Source('startup.cc')
52Source('stat_control.cc')
53Source('system.cc')
54
55if env['FULL_SYSTEM']:
56    Source('arguments.cc')
57else:
58    Source('tlb.cc')
59    SimObject('Process.py')
60
61    Source('process.cc')
62    Source('syscall_emul.cc')
63
64TraceFlag('Config')
65TraceFlag('Event')
66TraceFlag('Fault')
67TraceFlag('Flow')
68TraceFlag('IPI')
69TraceFlag('IPR')
70TraceFlag('Interrupt')
71TraceFlag('Loader')
72TraceFlag('Stack')
73TraceFlag('SyscallVerbose')
74TraceFlag('TLB')
75TraceFlag('Thread')
76TraceFlag('Timer')
77TraceFlag('VtoPhys')
78