SConscript revision 5659
18968SN/A# -*- mode:python -*-
28968SN/A
311374Ssteve.reinhardt@amd.com# Copyright (c) 2006 The Regents of The University of Michigan
411374Ssteve.reinhardt@amd.com# All rights reserved.
511374Ssteve.reinhardt@amd.com#
68968SN/A# Redistribution and use in source and binary forms, with or without
711374Ssteve.reinhardt@amd.com# modification, are permitted provided that the following conditions are
811374Ssteve.reinhardt@amd.com# met: redistributions of source code must retain the above copyright
911374Ssteve.reinhardt@amd.com# notice, this list of conditions and the following disclaimer;
1011374Ssteve.reinhardt@amd.com# redistributions in binary form must reproduce the above copyright
1111374Ssteve.reinhardt@amd.com# notice, this list of conditions and the following disclaimer in the
1211374Ssteve.reinhardt@amd.com# documentation and/or other materials provided with the distribution;
1311374Ssteve.reinhardt@amd.com# neither the name of the copyright holders nor the names of its
1410036SAli.Saidi@ARM.com# contributors may be used to endorse or promote products derived from
1510036SAli.Saidi@ARM.com# this software without specific prior written permission.
1611374Ssteve.reinhardt@amd.com#
1711374Ssteve.reinhardt@amd.com# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
1811374Ssteve.reinhardt@amd.com# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
1911374Ssteve.reinhardt@amd.com# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
2011374Ssteve.reinhardt@amd.com# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
2111374Ssteve.reinhardt@amd.com# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
2211374Ssteve.reinhardt@amd.com# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
2311374Ssteve.reinhardt@amd.com# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
2411374Ssteve.reinhardt@amd.com# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
2511374Ssteve.reinhardt@amd.com# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2611374Ssteve.reinhardt@amd.com# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
2711374Ssteve.reinhardt@amd.com# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2811374Ssteve.reinhardt@amd.com#
2911374Ssteve.reinhardt@amd.com# Authors: Nathan Binkert
3011374Ssteve.reinhardt@amd.com
3111374Ssteve.reinhardt@amd.comImport('*')
3211374Ssteve.reinhardt@amd.com
3311374Ssteve.reinhardt@amd.comSimObject('BaseTLB.py')
3411374Ssteve.reinhardt@amd.comSimObject('Root.py')
3511374Ssteve.reinhardt@amd.comSimObject('System.py')
3611374Ssteve.reinhardt@amd.comSimObject('InstTracer.py')
3711374Ssteve.reinhardt@amd.com
3811374Ssteve.reinhardt@amd.comSource('async.cc')
3911374Ssteve.reinhardt@amd.comSource('compile_info.cc')
4011374Ssteve.reinhardt@amd.comSource('core.cc')
4110526Snilay@cs.wisc.eduSource('debug.cc')
4211374Ssteve.reinhardt@amd.comSource('eventq.cc')
4311374Ssteve.reinhardt@amd.comSource('faults.cc')
4411374Ssteve.reinhardt@amd.comSource('init.cc')
4511374Ssteve.reinhardt@amd.comBinSource('main.cc')
4611374Ssteve.reinhardt@amd.comSource('root.cc')
4711374Ssteve.reinhardt@amd.comSource('serialize.cc')
4811374Ssteve.reinhardt@amd.comSource('sim_events.cc')
4911374Ssteve.reinhardt@amd.comSource('sim_object.cc')
5011374Ssteve.reinhardt@amd.comSource('simulate.cc')
5111374Ssteve.reinhardt@amd.comSource('startup.cc')
5211374Ssteve.reinhardt@amd.comSource('stat_control.cc')
5311374Ssteve.reinhardt@amd.comSource('system.cc')
5411374Ssteve.reinhardt@amd.com
5511374Ssteve.reinhardt@amd.comif env['FULL_SYSTEM']:
5611374Ssteve.reinhardt@amd.com    Source('arguments.cc')
5711374Ssteve.reinhardt@amd.com    Source('pseudo_inst.cc')
5811374Ssteve.reinhardt@amd.comelse:
5911374Ssteve.reinhardt@amd.com    Source('tlb.cc')
6011374Ssteve.reinhardt@amd.com    SimObject('Process.py')
6111374Ssteve.reinhardt@amd.com
6211374Ssteve.reinhardt@amd.com    Source('process.cc')
6311374Ssteve.reinhardt@amd.com    Source('syscall_emul.cc')
6411374Ssteve.reinhardt@amd.com
6511201Sandreas.hansson@arm.comTraceFlag('Config')
6611374Ssteve.reinhardt@amd.comTraceFlag('Event')
6711374Ssteve.reinhardt@amd.comTraceFlag('Fault')
6811374Ssteve.reinhardt@amd.comTraceFlag('Flow')
6911374Ssteve.reinhardt@amd.comTraceFlag('IPI')
7011374Ssteve.reinhardt@amd.comTraceFlag('IPR')
7111374Ssteve.reinhardt@amd.comTraceFlag('Interrupt')
7211374Ssteve.reinhardt@amd.comTraceFlag('Loader')
7311374Ssteve.reinhardt@amd.comTraceFlag('Stack')
7410526Snilay@cs.wisc.eduTraceFlag('SyscallVerbose')
7510526Snilay@cs.wisc.eduTraceFlag('TLB')
7611374Ssteve.reinhardt@amd.comTraceFlag('Thread')
7710526Snilay@cs.wisc.eduTraceFlag('Timer')
7810526Snilay@cs.wisc.eduTraceFlag('VtoPhys')
7910526Snilay@cs.wisc.edu