SConscript revision 11807
12086SN/A# -*- mode:python -*- 22086SN/A 32086SN/A# Copyright (c) 2006 The Regents of The University of Michigan 42086SN/A# All rights reserved. 52086SN/A# 62086SN/A# Redistribution and use in source and binary forms, with or without 72086SN/A# modification, are permitted provided that the following conditions are 82086SN/A# met: redistributions of source code must retain the above copyright 92086SN/A# notice, this list of conditions and the following disclaimer; 102086SN/A# redistributions in binary form must reproduce the above copyright 112086SN/A# notice, this list of conditions and the following disclaimer in the 122086SN/A# documentation and/or other materials provided with the distribution; 132086SN/A# neither the name of the copyright holders nor the names of its 142086SN/A# contributors may be used to endorse or promote products derived from 152086SN/A# this software without specific prior written permission. 162086SN/A# 172086SN/A# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 182086SN/A# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 192086SN/A# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 202086SN/A# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 212086SN/A# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 222086SN/A# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 232086SN/A# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 242086SN/A# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 252086SN/A# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 262086SN/A# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 272086SN/A# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 282665Ssaidi@eecs.umich.edu# 292665Ssaidi@eecs.umich.edu# Authors: Nathan Binkert 302665Ssaidi@eecs.umich.edu 312686Sksewell@umich.eduImport('*') 322086SN/A 334202Sbinkertn@umich.eduSimObject('ClockedObject.py') 342086SN/ASimObject('TickedObject.py') 354202Sbinkertn@umich.eduSimObject('Root.py') 364202Sbinkertn@umich.eduSimObject('ClockDomain.py') 374202Sbinkertn@umich.eduSimObject('VoltageDomain.py') 384202Sbinkertn@umich.eduSimObject('System.py') 392086SN/ASimObject('DVFSHandler.py') 404202Sbinkertn@umich.eduSimObject('SubSystem.py') 414202Sbinkertn@umich.edu 424202Sbinkertn@umich.eduSource('arguments.cc') 434202Sbinkertn@umich.eduSource('async.cc') 444202Sbinkertn@umich.eduSource('backtrace_%s.cc' % env['BACKTRACE_IMPL']) 452086SN/ASource('core.cc') 464202Sbinkertn@umich.eduSource('tags.cc') 474202Sbinkertn@umich.eduSource('cxx_config.cc') 482086SN/ASource('cxx_manager.cc') 494202Sbinkertn@umich.eduSource('cxx_config_ini.cc') 504202Sbinkertn@umich.eduSource('debug.cc') 514202Sbinkertn@umich.eduSource('py_interact.cc', skip_no_python=True) 524202Sbinkertn@umich.eduSource('eventq.cc') 534202Sbinkertn@umich.eduSource('global_event.cc') 544202Sbinkertn@umich.eduSource('init.cc', skip_no_python=True) 55Source('init_signals.cc') 56Source('main.cc', main=True, skip_lib=True) 57Source('root.cc') 58Source('serialize.cc') 59Source('drain.cc') 60Source('sim_events.cc') 61Source('sim_object.cc') 62Source('sub_system.cc') 63Source('ticked_object.cc') 64Source('simulate.cc') 65Source('stat_control.cc') 66Source('stat_register.cc', skip_no_python=True) 67Source('clock_domain.cc') 68Source('voltage_domain.cc') 69Source('linear_solver.cc') 70Source('system.cc') 71Source('dvfs_handler.cc') 72Source('clocked_object.cc') 73Source('mathexpr.cc') 74 75if env['TARGET_ISA'] != 'null': 76 SimObject('InstTracer.py') 77 SimObject('Process.py') 78 Source('faults.cc') 79 Source('process.cc') 80 Source('fd_entry.cc') 81 Source('pseudo_inst.cc') 82 Source('syscall_emul.cc') 83 Source('syscall_desc.cc') 84 85if env['TARGET_ISA'] != 'x86': 86 Source('microcode_rom.cc') 87 88DebugFlag('Checkpoint') 89DebugFlag('Config') 90DebugFlag('CxxConfig') 91DebugFlag('Drain') 92DebugFlag('Event') 93DebugFlag('Fault') 94DebugFlag('Flow') 95DebugFlag('IPI') 96DebugFlag('IPR') 97DebugFlag('Interrupt') 98DebugFlag('Loader') 99DebugFlag('PseudoInst') 100DebugFlag('Stack') 101DebugFlag('SyscallBase') 102DebugFlag('SyscallVerbose') 103DebugFlag('TimeSync') 104DebugFlag('Thread') 105DebugFlag('Timer') 106DebugFlag('VtoPhys') 107DebugFlag('WorkItems') 108DebugFlag('ClockDomain') 109DebugFlag('VoltageDomain') 110DebugFlag('DVFS') 111 112CompoundFlag('SyscallAll', [ 'SyscallBase', 'SyscallVerbose']) 113