SConscript revision 10810 
19397Sandreas.hansson@arm.com# -*- mode:python -*-
29397Sandreas.hansson@arm.com
311807Snikos.nikoleris@arm.com# Copyright (c) 2006 The Regents of The University of Michigan
49397Sandreas.hansson@arm.com# All rights reserved.
59397Sandreas.hansson@arm.com#
69397Sandreas.hansson@arm.com# Redistribution and use in source and binary forms, with or without
79397Sandreas.hansson@arm.com# modification, are permitted provided that the following conditions are
89397Sandreas.hansson@arm.com# met: redistributions of source code must retain the above copyright
99397Sandreas.hansson@arm.com# notice, this list of conditions and the following disclaimer;
109397Sandreas.hansson@arm.com# redistributions in binary form must reproduce the above copyright
119397Sandreas.hansson@arm.com# notice, this list of conditions and the following disclaimer in the
129397Sandreas.hansson@arm.com# documentation and/or other materials provided with the distribution;
139397Sandreas.hansson@arm.com# neither the name of the copyright holders nor the names of its
149397Sandreas.hansson@arm.com# contributors may be used to endorse or promote products derived from
159397Sandreas.hansson@arm.com# this software without specific prior written permission.
169397Sandreas.hansson@arm.com#
179397Sandreas.hansson@arm.com# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
189397Sandreas.hansson@arm.com# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
199397Sandreas.hansson@arm.com# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
209397Sandreas.hansson@arm.com# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
219397Sandreas.hansson@arm.com# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
229397Sandreas.hansson@arm.com# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
239397Sandreas.hansson@arm.com# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
249397Sandreas.hansson@arm.com# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
259397Sandreas.hansson@arm.com# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
269397Sandreas.hansson@arm.com# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
279397Sandreas.hansson@arm.com# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
289397Sandreas.hansson@arm.com#
299397Sandreas.hansson@arm.com# Authors: Nathan Binkert
309397Sandreas.hansson@arm.com
319397Sandreas.hansson@arm.comImport('*')
329397Sandreas.hansson@arm.com
339397Sandreas.hansson@arm.comSimObject('ClockedObject.py')
349397Sandreas.hansson@arm.comSimObject('TickedObject.py')
359397Sandreas.hansson@arm.comSimObject('Root.py')
369397Sandreas.hansson@arm.comSimObject('ClockDomain.py')
379397Sandreas.hansson@arm.comSimObject('VoltageDomain.py')
389397Sandreas.hansson@arm.comSimObject('System.py')
399397Sandreas.hansson@arm.comSimObject('DVFSHandler.py')
409397Sandreas.hansson@arm.comSimObject('SubSystem.py')
419397Sandreas.hansson@arm.com
429397Sandreas.hansson@arm.comSource('arguments.cc')
439397Sandreas.hansson@arm.comSource('async.cc')
4411247Sradhika.jagtap@ARM.comSource('core.cc')
459398Sandreas.hansson@arm.comSource('cxx_config.cc')
4610695SAli.Saidi@ARM.comSource('cxx_manager.cc')
479397Sandreas.hansson@arm.comSource('cxx_config_ini.cc')
4811807Snikos.nikoleris@arm.comSource('debug.cc')
4911807Snikos.nikoleris@arm.comSource('py_interact.cc', skip_no_python=True)
5011807Snikos.nikoleris@arm.comSource('eventq.cc')
5111807Snikos.nikoleris@arm.comSource('global_event.cc')
5211807Snikos.nikoleris@arm.comSource('init.cc', skip_no_python=True)
53Source('init_signals.cc')
54Source('main.cc', main=True, skip_lib=True)
55Source('root.cc')
56Source('serialize.cc')
57Source('drain.cc')
58Source('sim_events.cc')
59Source('sim_object.cc')
60Source('sub_system.cc')
61Source('ticked_object.cc')
62Source('simulate.cc')
63Source('stat_control.cc')
64Source('stat_register.cc', skip_no_python=True)
65Source('clock_domain.cc')
66Source('voltage_domain.cc')
67Source('system.cc')
68Source('dvfs_handler.cc')
69
70if env['TARGET_ISA'] != 'null':
71    SimObject('InstTracer.py')
72    SimObject('Process.py')
73    Source('faults.cc')
74    Source('process.cc')
75    Source('pseudo_inst.cc')
76    Source('syscall_emul.cc')
77
78DebugFlag('Checkpoint')
79DebugFlag('Config')
80DebugFlag('CxxConfig')
81DebugFlag('Drain')
82DebugFlag('Event')
83DebugFlag('Fault')
84DebugFlag('Flow')
85DebugFlag('IPI')
86DebugFlag('IPR')
87DebugFlag('Interrupt')
88DebugFlag('Loader')
89DebugFlag('PseudoInst')
90DebugFlag('Stack')
91DebugFlag('SyscallVerbose')
92DebugFlag('TimeSync')
93DebugFlag('Thread')
94DebugFlag('Timer')
95DebugFlag('VtoPhys')
96DebugFlag('WorkItems')
97DebugFlag('ClockDomain')
98DebugFlag('VoltageDomain')
99DebugFlag('DVFS')
100