inst.proto revision 10695
1// Copyright (c) 2014 ARM Limited 2// All rights reserved 3// 4// The license below extends only to copyright in the software and shall 5// not be construed as granting a license to any other intellectual 6// property including but not limited to intellectual property relating 7// to a hardware implementation of the functionality of the software 8// licensed hereunder. You may use the software subject to the license 9// terms below provided that you ensure that this notice is replicated 10// unmodified and in its entirety in all distributions of the software, 11// modified or unmodified, in source code or in binary form. 12// 13// Redistribution and use in source and binary forms, with or without 14// modification, are permitted provided that the following conditions are 15// met: redistributions of source code must retain the above copyright 16// notice, this list of conditions and the following disclaimer; 17// redistributions in binary form must reproduce the above copyright 18// notice, this list of conditions and the following disclaimer in the 19// documentation and/or other materials provided with the distribution; 20// neither the name of the copyright holders nor the names of its 21// contributors may be used to endorse or promote products derived from 22// this software without specific prior written permission. 23// 24// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 25// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 26// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 27// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 28// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 29// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 30// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 34// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35// 36// Authors: Ali Saidi 37 38 39// Put all the generated messages in a namespace 40package ProtoMessage; 41 42// Packet header with the identifier describing what object captured 43// the trace, the version of this file format, and the tick frequency 44// for all the packet time stamps. 45message InstHeader { 46 required string obj_id = 1; 47 required uint32 ver = 2 [default = 0]; 48 required uint64 tick_freq = 3; 49 required bool has_mem = 4; 50} 51 52message Inst { 53 required uint64 pc = 1; 54 required fixed32 inst = 2; 55 optional uint32 nodeid = 3; 56 optional uint32 cpuid = 4; 57 optional fixed64 tick = 5; 58 59 enum InstType { 60 None = 0; 61 IntAlu = 1; 62 IntMul = 2; 63 IntDiv = 3; 64 FloatAdd = 4; 65 FloatCmp = 5; 66 FloatCvt = 6; 67 FloatMult = 7; 68 FloatDiv = 8; 69 FloatSqrt = 9; 70 SIMDIntAdd = 10; 71 SIMDIntAddAcc = 11; 72 SIMDIntAlu = 12; 73 SIMDIntCmp = 13; 74 SIMDIntCvt = 14; 75 SIMDMisc = 15; 76 SIMDIntMult = 16; 77 SIMDIntMultAcc = 17; 78 SIMDIntShift = 18; 79 SIMDIntShiftAcc = 19; 80 SIMDSqrt = 20; 81 SIMDFloatAdd = 21; 82 SIMDFloatAlu = 22; 83 SIMDFloatCmp = 23; 84 SIMDFloatCvt = 24; 85 SIMDFloatDiv = 25; 86 SIMDFloatMisc = 26; 87 SIMDFloatMult = 27; 88 SIMDFloatMultAdd = 28; 89 SIMDFloatSqrt = 29; 90 MemRead = 30; 91 MemWrite = 31; 92 IprAccess = 32; 93 InstPrefetch = 33; 94 } 95 96 optional InstType type = 6; // add, mul, fp add, load, store, simd add, … 97 optional uint32 inst_flags = 7; // execution mode information 98 99 // If the operation does one or more memory accesses 100 message MemAccess { 101 required uint64 addr = 1; 102 required uint32 size = 2; 103 optional uint32 mem_flags = 3; 104 } 105 repeated MemAccess mem_access = 8; 106} 107 108