tport.cc revision 4874:cdae9adbd276
12810Srdreslin@umich.edu/*
29796Sprakash.ramrakhyani@arm.com * Copyright (c) 2006 The Regents of The University of Michigan
39347SAndreas.Sandberg@arm.com * All rights reserved.
49347SAndreas.Sandberg@arm.com *
59347SAndreas.Sandberg@arm.com * Redistribution and use in source and binary forms, with or without
69347SAndreas.Sandberg@arm.com * modification, are permitted provided that the following conditions are
79347SAndreas.Sandberg@arm.com * met: redistributions of source code must retain the above copyright
89347SAndreas.Sandberg@arm.com * notice, this list of conditions and the following disclaimer;
99347SAndreas.Sandberg@arm.com * redistributions in binary form must reproduce the above copyright
109347SAndreas.Sandberg@arm.com * notice, this list of conditions and the following disclaimer in the
119347SAndreas.Sandberg@arm.com * documentation and/or other materials provided with the distribution;
129347SAndreas.Sandberg@arm.com * neither the name of the copyright holders nor the names of its
139347SAndreas.Sandberg@arm.com * contributors may be used to endorse or promote products derived from
142810Srdreslin@umich.edu * this software without specific prior written permission.
152810Srdreslin@umich.edu *
162810Srdreslin@umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
172810Srdreslin@umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
182810Srdreslin@umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
192810Srdreslin@umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
202810Srdreslin@umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
212810Srdreslin@umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
222810Srdreslin@umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
232810Srdreslin@umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
242810Srdreslin@umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
252810Srdreslin@umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
262810Srdreslin@umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272810Srdreslin@umich.edu *
282810Srdreslin@umich.edu * Authors: Ali Saidi
292810Srdreslin@umich.edu */
302810Srdreslin@umich.edu
312810Srdreslin@umich.edu#include "mem/tport.hh"
322810Srdreslin@umich.edu
332810Srdreslin@umich.eduvoid
342810Srdreslin@umich.eduSimpleTimingPort::checkFunctional(PacketPtr pkt)
352810Srdreslin@umich.edu{
362810Srdreslin@umich.edu    DeferredPacketIterator i = transmitList.begin();
372810Srdreslin@umich.edu    DeferredPacketIterator end = transmitList.end();
382810Srdreslin@umich.edu
392810Srdreslin@umich.edu    for (; i != end; ++i) {
402810Srdreslin@umich.edu        PacketPtr target = i->pkt;
412810Srdreslin@umich.edu        // If the target contains data, and it overlaps the
422810Srdreslin@umich.edu        // probed request, need to update data
432810Srdreslin@umich.edu        if (pkt->checkFunctional(target)) {
442810Srdreslin@umich.edu            return;
452810Srdreslin@umich.edu        }
462810Srdreslin@umich.edu    }
472810Srdreslin@umich.edu}
486216Snate@binkert.org
496216Snate@binkert.orgvoid
502810Srdreslin@umich.eduSimpleTimingPort::recvFunctional(PacketPtr pkt)
512810Srdreslin@umich.edu{
5211168Sandreas.hansson@arm.com    checkFunctional(pkt);
532810Srdreslin@umich.edu
548229Snate@binkert.org    // Just do an atomic access and throw away the returned latency
555338Sstever@gmail.com    if (!pkt->isResponse())
562810Srdreslin@umich.edu        recvAtomic(pkt);
579796Sprakash.ramrakhyani@arm.com}
582810Srdreslin@umich.edu
592810Srdreslin@umich.edubool
602810Srdreslin@umich.eduSimpleTimingPort::recvTiming(PacketPtr pkt)
612810Srdreslin@umich.edu{
622810Srdreslin@umich.edu    // If the device is only a slave, it should only be sending
632810Srdreslin@umich.edu    // responses, which should never get nacked.  There used to be
642810Srdreslin@umich.edu    // code to hanldle nacks here, but I'm pretty sure it didn't work
652810Srdreslin@umich.edu    // correctly with the drain code, so that would need to be fixed
662810Srdreslin@umich.edu    // if we ever added it back.
672810Srdreslin@umich.edu    assert(pkt->isRequest());
682810Srdreslin@umich.edu
692810Srdreslin@umich.edu    if (pkt->memInhibitAsserted()) {
702810Srdreslin@umich.edu        // snooper will supply based on copy of packet
712810Srdreslin@umich.edu        // still target's responsibility to delete packet
722810Srdreslin@umich.edu        delete pkt->req;
732810Srdreslin@umich.edu        delete pkt;
742810Srdreslin@umich.edu        return true;
752810Srdreslin@umich.edu    }
762810Srdreslin@umich.edu
772810Srdreslin@umich.edu    bool needsResponse = pkt->needsResponse();
782810Srdreslin@umich.edu    Tick latency = recvAtomic(pkt);
792810Srdreslin@umich.edu    // turn packet around to go back to requester if response expected
802810Srdreslin@umich.edu    if (needsResponse) {
812810Srdreslin@umich.edu        // recvAtomic() should already have turned packet into
822810Srdreslin@umich.edu        // atomic response
832810Srdreslin@umich.edu        assert(pkt->isResponse());
842810Srdreslin@umich.edu        schedSendTiming(pkt, curTick + latency);
852810Srdreslin@umich.edu    } else {
862810Srdreslin@umich.edu        delete pkt->req;
872810Srdreslin@umich.edu        delete pkt;
882810Srdreslin@umich.edu    }
892810Srdreslin@umich.edu
902810Srdreslin@umich.edu    return true;
912810Srdreslin@umich.edu}
922810Srdreslin@umich.edu
932810Srdreslin@umich.edu
946227Snate@binkert.orgvoid
952810Srdreslin@umich.eduSimpleTimingPort::schedSendTiming(PacketPtr pkt, Tick when)
962810Srdreslin@umich.edu{
972810Srdreslin@umich.edu    assert(when > curTick);
982810Srdreslin@umich.edu
992810Srdreslin@umich.edu    // Nothing is on the list: add it and schedule an event
1002810Srdreslin@umich.edu    if (transmitList.empty() || when < transmitList.front().tick) {
1016227Snate@binkert.org        transmitList.push_front(DeferredPacket(when, pkt));
1022810Srdreslin@umich.edu        schedSendEvent(when);
1032810Srdreslin@umich.edu        return;
1042810Srdreslin@umich.edu    }
1052810Srdreslin@umich.edu
1062810Srdreslin@umich.edu    // list is non-empty and this is not the head, so event should
1072810Srdreslin@umich.edu    // already be scheduled
1082810Srdreslin@umich.edu    assert(waitingOnRetry ||
1092810Srdreslin@umich.edu           (sendEvent->scheduled() && sendEvent->when() <= when));
1102810Srdreslin@umich.edu
1112810Srdreslin@umich.edu    // list is non-empty & this belongs at the end
11211168Sandreas.hansson@arm.com    if (when >= transmitList.back().tick) {
1132810Srdreslin@umich.edu        transmitList.push_back(DeferredPacket(when, pkt));
1142810Srdreslin@umich.edu        return;
1152810Srdreslin@umich.edu    }
1162810Srdreslin@umich.edu
1172810Srdreslin@umich.edu    // this belongs in the middle somewhere
1182810Srdreslin@umich.edu    DeferredPacketIterator i = transmitList.begin();
1192810Srdreslin@umich.edu    i++; // already checked for insertion at front
1202810Srdreslin@umich.edu    DeferredPacketIterator end = transmitList.end();
1212810Srdreslin@umich.edu
1222810Srdreslin@umich.edu    for (; i != end; ++i) {
1232810Srdreslin@umich.edu        if (when < i->tick) {
1242810Srdreslin@umich.edu            transmitList.insert(i, DeferredPacket(when, pkt));
1252810Srdreslin@umich.edu            return;
1262810Srdreslin@umich.edu        }
1272810Srdreslin@umich.edu    }
1282810Srdreslin@umich.edu    assert(false); // should never get here
1292810Srdreslin@umich.edu}
1302810Srdreslin@umich.edu
1312810Srdreslin@umich.edu
1322810Srdreslin@umich.eduvoid
1332810Srdreslin@umich.eduSimpleTimingPort::sendDeferredPacket()
1342810Srdreslin@umich.edu{
1352810Srdreslin@umich.edu    assert(deferredPacketReady());
1362810Srdreslin@umich.edu    // take packet off list here; if recvTiming() on the other side
1372810Srdreslin@umich.edu    // calls sendTiming() back on us (like SimpleTimingCpu does), then
1382810Srdreslin@umich.edu    // we get confused by having a non-active packet on transmitList
1392810Srdreslin@umich.edu    DeferredPacket dp = transmitList.front();
1402810Srdreslin@umich.edu    transmitList.pop_front();
1412810Srdreslin@umich.edu    bool success = sendTiming(dp.pkt);
1422810Srdreslin@umich.edu
1432810Srdreslin@umich.edu    if (success) {
1442810Srdreslin@umich.edu        if (!transmitList.empty() && !sendEvent->scheduled()) {
1452810Srdreslin@umich.edu            Tick time = transmitList.front().tick;
1462810Srdreslin@umich.edu            sendEvent->schedule(time <= curTick ? curTick+1 : time);
1475999Snate@binkert.org        }
1482810Srdreslin@umich.edu
1495999Snate@binkert.org        if (transmitList.empty() && drainEvent) {
1502810Srdreslin@umich.edu            drainEvent->process();
1515999Snate@binkert.org            drainEvent = NULL;
1522810Srdreslin@umich.edu        }
1532810Srdreslin@umich.edu    } else {
1542810Srdreslin@umich.edu        // Unsuccessful, need to put back on transmitList.  Callee
1552810Srdreslin@umich.edu        // should not have messed with it (since it didn't accept that
1562810Srdreslin@umich.edu        // packet), so we can just push it back on the front.
1572810Srdreslin@umich.edu        assert(!sendEvent->scheduled());
1589796Sprakash.ramrakhyani@arm.com        transmitList.push_front(dp);
1599796Sprakash.ramrakhyani@arm.com    }
1609796Sprakash.ramrakhyani@arm.com
1612810Srdreslin@umich.edu    waitingOnRetry = !success;
1622810Srdreslin@umich.edu
1632810Srdreslin@umich.edu    if (waitingOnRetry) {
1649796Sprakash.ramrakhyani@arm.com        DPRINTF(Bus, "Send failed, waiting on retry\n");
1659086Sandreas.hansson@arm.com    }
1662810Srdreslin@umich.edu}
1672810Srdreslin@umich.edu
1682810Srdreslin@umich.edu
1692810Srdreslin@umich.eduvoid
1702810Srdreslin@umich.eduSimpleTimingPort::recvRetry()
17111169Sandreas.hansson@arm.com{
1722810Srdreslin@umich.edu    DPRINTF(Bus, "Received retry\n");
1732810Srdreslin@umich.edu    assert(waitingOnRetry);
1743862Sstever@eecs.umich.edu    sendDeferredPacket();
1753862Sstever@eecs.umich.edu}
1762810Srdreslin@umich.edu
17711169Sandreas.hansson@arm.com
1782810Srdreslin@umich.eduvoid
1792810Srdreslin@umich.eduSimpleTimingPort::processSendEvent()
18011483Snikos.nikoleris@arm.com{
18111483Snikos.nikoleris@arm.com    assert(!waitingOnRetry);
1825716Shsul@eecs.umich.edu    sendDeferredPacket();
1835716Shsul@eecs.umich.edu}
1842810Srdreslin@umich.edu
18510028SGiacomo.Gabrielli@arm.com
1862810Srdreslin@umich.eduunsigned int
1872810Srdreslin@umich.eduSimpleTimingPort::drain(Event *de)
1882810Srdreslin@umich.edu{
1892810Srdreslin@umich.edu    if (transmitList.size() == 0)
1902810Srdreslin@umich.edu        return 0;
19110815Sdavid.guillen@arm.com    drainEvent = de;
19210815Sdavid.guillen@arm.com    return 1;
19310815Sdavid.guillen@arm.com}
19410815Sdavid.guillen@arm.com