tport.cc revision 4670 
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ali Saidi
29 */
30
31#include "mem/tport.hh"
32
33void
34SimpleTimingPort::checkFunctional(PacketPtr pkt)
35{
36    DeferredPacketIterator i = transmitList.begin();
37    DeferredPacketIterator end = transmitList.end();
38
39    for (; i != end; ++i) {
40        PacketPtr target = i->pkt;
41        // If the target contains data, and it overlaps the
42        // probed request, need to update data
43        if (target->intersect(pkt)) {
44            if (!fixPacket(pkt, target)) {
45                // fixPacket returns true for continue, false for done
46                return;
47            }
48        }
49    }
50}
51
52void
53SimpleTimingPort::recvFunctional(PacketPtr pkt)
54{
55    checkFunctional(pkt);
56
57    // Just do an atomic access and throw away the returned latency
58    if (pkt->result != Packet::Success)
59        recvAtomic(pkt);
60}
61
62bool
63SimpleTimingPort::recvTiming(PacketPtr pkt)
64{
65    // If the device is only a slave, it should only be sending
66    // responses, which should never get nacked.  There used to be
67    // code to hanldle nacks here, but I'm pretty sure it didn't work
68    // correctly with the drain code, so that would need to be fixed
69    // if we ever added it back.
70    assert(pkt->isRequest());
71    assert(pkt->result == Packet::Unknown);
72
73    if (pkt->memInhibitAsserted()) {
74        // snooper will supply based on copy of packet
75        // still target's responsibility to delete packet
76        delete pkt->req;
77        delete pkt;
78        return true;
79    }
80
81    bool needsResponse = pkt->needsResponse();
82    Tick latency = recvAtomic(pkt);
83    // turn packet around to go back to requester if response expected
84    if (needsResponse) {
85        // recvAtomic() should already have turned packet into
86        // atomic response
87        assert(pkt->isResponse());
88        pkt->convertAtomicToTimingResponse();
89        schedSendTiming(pkt, curTick + latency);
90    } else {
91        delete pkt->req;
92        delete pkt;
93    }
94
95    return true;
96}
97
98
99void
100SimpleTimingPort::schedSendTiming(PacketPtr pkt, Tick when)
101{
102    assert(when > curTick);
103
104    // Nothing is on the list: add it and schedule an event
105    if (transmitList.empty() || when < transmitList.front().tick) {
106        transmitList.push_front(DeferredPacket(when, pkt));
107        schedSendEvent(when);
108        return;
109    }
110
111    // list is non-empty and this is not the head, so event should
112    // already be scheduled
113    assert(waitingOnRetry ||
114           (sendEvent->scheduled() && sendEvent->when() <= when));
115
116    // list is non-empty & this belongs at the end
117    if (when >= transmitList.back().tick) {
118        transmitList.push_back(DeferredPacket(when, pkt));
119        return;
120    }
121
122    // this belongs in the middle somewhere
123    DeferredPacketIterator i = transmitList.begin();
124    i++; // already checked for insertion at front
125    DeferredPacketIterator end = transmitList.end();
126
127    for (; i != end; ++i) {
128        if (when < i->tick) {
129            transmitList.insert(i, DeferredPacket(when, pkt));
130            return;
131        }
132    }
133    assert(false); // should never get here
134}
135
136
137void
138SimpleTimingPort::sendDeferredPacket()
139{
140    assert(deferredPacketReady());
141    bool success = sendTiming(transmitList.front().pkt);
142
143    if (success) {
144        //send successful, remove packet
145        transmitList.pop_front();
146        if (!transmitList.empty()) {
147            Tick time = transmitList.front().tick;
148            sendEvent->schedule(time <= curTick ? curTick+1 : time);
149        }
150
151        if (transmitList.empty() && drainEvent) {
152            drainEvent->process();
153            drainEvent = NULL;
154        }
155    }
156
157    waitingOnRetry = !success;
158
159    if (waitingOnRetry) {
160        DPRINTF(Bus, "Send failed, waiting on retry\n");
161    }
162}
163
164
165void
166SimpleTimingPort::recvRetry()
167{
168    DPRINTF(Bus, "Received retry\n");
169    assert(waitingOnRetry);
170    sendDeferredPacket();
171}
172
173
174void
175SimpleTimingPort::processSendEvent()
176{
177    assert(!waitingOnRetry);
178    sendDeferredPacket();
179}
180
181
182unsigned int
183SimpleTimingPort::drain(Event *de)
184{
185    if (transmitList.size() == 0)
186        return 0;
187    drainEvent = de;
188    return 1;
189}
190