tport.cc revision 5606
12SN/A/*
210905Sandreas.sandberg@arm.com * Copyright (c) 2006 The Regents of The University of Michigan
310905Sandreas.sandberg@arm.com * All rights reserved.
410905Sandreas.sandberg@arm.com *
510905Sandreas.sandberg@arm.com * Redistribution and use in source and binary forms, with or without
610905Sandreas.sandberg@arm.com * modification, are permitted provided that the following conditions are
710905Sandreas.sandberg@arm.com * met: redistributions of source code must retain the above copyright
810905Sandreas.sandberg@arm.com * notice, this list of conditions and the following disclaimer;
910905Sandreas.sandberg@arm.com * redistributions in binary form must reproduce the above copyright
1010905Sandreas.sandberg@arm.com * notice, this list of conditions and the following disclaimer in the
1110905Sandreas.sandberg@arm.com * documentation and/or other materials provided with the distribution;
1210905Sandreas.sandberg@arm.com * neither the name of the copyright holders nor the names of its
1310905Sandreas.sandberg@arm.com * contributors may be used to endorse or promote products derived from
141762SN/A * this software without specific prior written permission.
152SN/A *
162SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
172SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
182SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
192SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
202SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
212SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
222SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
232SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
242SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
252SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
262SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272SN/A *
282SN/A * Authors: Ali Saidi
292SN/A */
302SN/A
312SN/A#include "mem/tport.hh"
322SN/A
332SN/Abool
342SN/ASimpleTimingPort::checkFunctional(PacketPtr pkt)
352SN/A{
362SN/A    DeferredPacketIterator i = transmitList.begin();
372SN/A    DeferredPacketIterator end = transmitList.end();
382SN/A
392665Ssaidi@eecs.umich.edu    for (; i != end; ++i) {
402760Sbinkertn@umich.edu        PacketPtr target = i->pkt;
412760Sbinkertn@umich.edu        // If the target contains data, and it overlaps the
422665Ssaidi@eecs.umich.edu        // probed request, need to update data
4310905Sandreas.sandberg@arm.com        if (pkt->checkFunctional(target)) {
442SN/A            return true;
452SN/A        }
462SN/A    }
472SN/A
482SN/A    return false;
492SN/A}
502SN/A
512SN/Avoid
522SN/ASimpleTimingPort::recvFunctional(PacketPtr pkt)
532SN/A{
548229Snate@binkert.org    if (!checkFunctional(pkt)) {
552SN/A        // Just do an atomic access and throw away the returned latency
568229Snate@binkert.org        recvAtomic(pkt);
5710905Sandreas.sandberg@arm.com    }
584841Ssaidi@eecs.umich.edu}
592SN/A
6010459SAndreas.Sandberg@ARM.combool
616214Snate@binkert.orgSimpleTimingPort::recvTiming(PacketPtr pkt)
622SN/A{
632738Sstever@eecs.umich.edu    // If the device is only a slave, it should only be sending
64395SN/A    // responses, which should never get nacked.  There used to be
6510905Sandreas.sandberg@arm.com    // code to hanldle nacks here, but I'm pretty sure it didn't work
664000Ssaidi@eecs.umich.edu    // correctly with the drain code, so that would need to be fixed
6711067Sandreas.sandberg@arm.com    // if we ever added it back.
689983Sstever@gmail.com    assert(pkt->isRequest());
692SN/A
7010905Sandreas.sandberg@arm.com    if (pkt->memInhibitAsserted()) {
7110905Sandreas.sandberg@arm.com        // snooper will supply based on copy of packet
7210905Sandreas.sandberg@arm.com        // still target's responsibility to delete packet
739048SAli.Saidi@ARM.com        delete pkt;
749048SAli.Saidi@ARM.com        return true;
759056SAli.Saidi@ARM.com    }
769048SAli.Saidi@ARM.com
779048SAli.Saidi@ARM.com    bool needsResponse = pkt->needsResponse();
789056SAli.Saidi@ARM.com    Tick latency = recvAtomic(pkt);
799048SAli.Saidi@ARM.com    // turn packet around to go back to requester if response expected
8010930Sbrandon.potter@amd.com    if (needsResponse) {
819048SAli.Saidi@ARM.com        // recvAtomic() should already have turned packet into
82217SN/A        // atomic response
8310905Sandreas.sandberg@arm.com        assert(pkt->isResponse());
84217SN/A        schedSendTiming(pkt, curTick + latency);
8510459SAndreas.Sandberg@ARM.com    } else {
8610905Sandreas.sandberg@arm.com        delete pkt;
8710459SAndreas.Sandberg@ARM.com    }
8810459SAndreas.Sandberg@ARM.com
8910905Sandreas.sandberg@arm.com    return true;
9010459SAndreas.Sandberg@ARM.com}
9110459SAndreas.Sandberg@ARM.com
92217SN/A
9310905Sandreas.sandberg@arm.comvoid
94217SN/ASimpleTimingPort::schedSendTiming(PacketPtr pkt, Tick when)
9510459SAndreas.Sandberg@ARM.com{
9610905Sandreas.sandberg@arm.com    assert(when > curTick);
9710459SAndreas.Sandberg@ARM.com    assert(when < curTick + Clock::Int::ms);
9810459SAndreas.Sandberg@ARM.com
9910905Sandreas.sandberg@arm.com    // Nothing is on the list: add it and schedule an event
10010459SAndreas.Sandberg@ARM.com    if (transmitList.empty() || when < transmitList.front().tick) {
10110459SAndreas.Sandberg@ARM.com        transmitList.push_front(DeferredPacket(when, pkt));
102217SN/A        schedSendEvent(when);
10311075SCurtis.Dunham@arm.com        return;
10411075SCurtis.Dunham@arm.com    }
1056820SLisa.Hsu@amd.com
10610459SAndreas.Sandberg@ARM.com    // list is non-empty & this belongs at the end
10710905Sandreas.sandberg@arm.com    if (when >= transmitList.back().tick) {
10811075SCurtis.Dunham@arm.com        transmitList.push_back(DeferredPacket(when, pkt));
10911075SCurtis.Dunham@arm.com        return;
11010459SAndreas.Sandberg@ARM.com    }
11111075SCurtis.Dunham@arm.com
11210459SAndreas.Sandberg@ARM.com    // this belongs in the middle somewhere
11310459SAndreas.Sandberg@ARM.com    DeferredPacketIterator i = transmitList.begin();
1146820SLisa.Hsu@amd.com    i++; // already checked for insertion at front
11510905Sandreas.sandberg@arm.com    DeferredPacketIterator end = transmitList.end();
1166227Snate@binkert.org
117217SN/A    for (; i != end; ++i) {
118217SN/A        if (when < i->tick) {
11910905Sandreas.sandberg@arm.com            transmitList.insert(i, DeferredPacket(when, pkt));
1204841Ssaidi@eecs.umich.edu            return;
1214841Ssaidi@eecs.umich.edu        }
1224841Ssaidi@eecs.umich.edu    }
12310905Sandreas.sandberg@arm.com    assert(false); // should never get here
1247948SAli.Saidi@ARM.com}
1257948SAli.Saidi@ARM.com
1267948SAli.Saidi@ARM.com
12710905Sandreas.sandberg@arm.comvoid
12810905Sandreas.sandberg@arm.comSimpleTimingPort::sendDeferredPacket()
129217SN/A{
1304841Ssaidi@eecs.umich.edu    assert(deferredPacketReady());
13110905Sandreas.sandberg@arm.com    // take packet off list here; if recvTiming() on the other side
13210905Sandreas.sandberg@arm.com    // calls sendTiming() back on us (like SimpleTimingCpu does), then
1334841Ssaidi@eecs.umich.edu    // we get confused by having a non-active packet on transmitList
1347948SAli.Saidi@ARM.com    DeferredPacket dp = transmitList.front();
13510905Sandreas.sandberg@arm.com    transmitList.pop_front();
13610905Sandreas.sandberg@arm.com    bool success = sendTiming(dp.pkt);
1377948SAli.Saidi@ARM.com
138237SN/A    if (success) {
13910905Sandreas.sandberg@arm.com        if (!transmitList.empty() && !sendEvent->scheduled()) {
140237SN/A            Tick time = transmitList.front().tick;
141217SN/A            schedule(sendEvent, time <= curTick ? curTick+1 : time);
142217SN/A        }
143217SN/A
144237SN/A        if (transmitList.empty() && drainEvent) {
14510905Sandreas.sandberg@arm.com            drainEvent->process();
146217SN/A            drainEvent = NULL;
14710905Sandreas.sandberg@arm.com        }
14810905Sandreas.sandberg@arm.com    } else {
149217SN/A        // Unsuccessful, need to put back on transmitList.  Callee
150223SN/A        // should not have messed with it (since it didn't accept that
15110905Sandreas.sandberg@arm.com        // packet), so we can just push it back on the front.
152223SN/A        assert(!sendEvent->scheduled());
15311068Sandreas.sandberg@arm.com        transmitList.push_front(dp);
15411068Sandreas.sandberg@arm.com    }
15511068Sandreas.sandberg@arm.com
15611068Sandreas.sandberg@arm.com    waitingOnRetry = !success;
15711068Sandreas.sandberg@arm.com
15811068Sandreas.sandberg@arm.com    if (waitingOnRetry) {
159223SN/A        DPRINTF(Bus, "Send failed, waiting on retry\n");
1605543Ssaidi@eecs.umich.edu    }
16110905Sandreas.sandberg@arm.com}
162217SN/A
1635543Ssaidi@eecs.umich.edu
16410905Sandreas.sandberg@arm.comvoid
165237SN/ASimpleTimingPort::recvRetry()
16610903Sandreas.sandberg@arm.com{
16710905Sandreas.sandberg@arm.com    DPRINTF(Bus, "Received retry\n");
16810903Sandreas.sandberg@arm.com    assert(waitingOnRetry);
16910903Sandreas.sandberg@arm.com    sendDeferredPacket();
17010905Sandreas.sandberg@arm.com}
17110903Sandreas.sandberg@arm.com
17210906Sandreas.sandberg@arm.com
17310906Sandreas.sandberg@arm.comvoid
17410906Sandreas.sandberg@arm.comSimpleTimingPort::processSendEvent()
17510906Sandreas.sandberg@arm.com{
17610906Sandreas.sandberg@arm.com    assert(!waitingOnRetry);
17710906Sandreas.sandberg@arm.com    sendDeferredPacket();
17810906Sandreas.sandberg@arm.com}
17910906Sandreas.sandberg@arm.com
18010908Sandreas.sandberg@arm.com
18110908Sandreas.sandberg@arm.comunsigned int
18210906Sandreas.sandberg@arm.comSimpleTimingPort::drain(Event *de)
18310905Sandreas.sandberg@arm.com{
184237SN/A    if (transmitList.size() == 0)
1855543Ssaidi@eecs.umich.edu        return 0;
18611068Sandreas.sandberg@arm.com    drainEvent = de;
18711068Sandreas.sandberg@arm.com    return 1;
18811068Sandreas.sandberg@arm.com}
18911068Sandreas.sandberg@arm.com