tport.cc revision 13892
110259SAndrew.Bardsley@arm.com/* 210259SAndrew.Bardsley@arm.com * Copyright (c) 2012 ARM Limited 310259SAndrew.Bardsley@arm.com * All rights reserved. 410259SAndrew.Bardsley@arm.com * 510259SAndrew.Bardsley@arm.com * The license below extends only to copyright in the software and shall 610259SAndrew.Bardsley@arm.com * not be construed as granting a license to any other intellectual 710259SAndrew.Bardsley@arm.com * property including but not limited to intellectual property relating 810259SAndrew.Bardsley@arm.com * to a hardware implementation of the functionality of the software 910259SAndrew.Bardsley@arm.com * licensed hereunder. You may use the software subject to the license 1010259SAndrew.Bardsley@arm.com * terms below provided that you ensure that this notice is replicated 1110259SAndrew.Bardsley@arm.com * unmodified and in its entirety in all distributions of the software, 1210259SAndrew.Bardsley@arm.com * modified or unmodified, in source code or in binary form. 1310259SAndrew.Bardsley@arm.com * 1410259SAndrew.Bardsley@arm.com * Copyright (c) 2006 The Regents of The University of Michigan 1510259SAndrew.Bardsley@arm.com * All rights reserved. 1610259SAndrew.Bardsley@arm.com * 1710259SAndrew.Bardsley@arm.com * Redistribution and use in source and binary forms, with or without 1810259SAndrew.Bardsley@arm.com * modification, are permitted provided that the following conditions are 1910259SAndrew.Bardsley@arm.com * met: redistributions of source code must retain the above copyright 2010259SAndrew.Bardsley@arm.com * notice, this list of conditions and the following disclaimer; 2110259SAndrew.Bardsley@arm.com * redistributions in binary form must reproduce the above copyright 2210259SAndrew.Bardsley@arm.com * notice, this list of conditions and the following disclaimer in the 2310259SAndrew.Bardsley@arm.com * documentation and/or other materials provided with the distribution; 2410259SAndrew.Bardsley@arm.com * neither the name of the copyright holders nor the names of its 2510259SAndrew.Bardsley@arm.com * contributors may be used to endorse or promote products derived from 2610259SAndrew.Bardsley@arm.com * this software without specific prior written permission. 2710259SAndrew.Bardsley@arm.com * 2810259SAndrew.Bardsley@arm.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 2910259SAndrew.Bardsley@arm.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 3010259SAndrew.Bardsley@arm.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 3110259SAndrew.Bardsley@arm.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 3210259SAndrew.Bardsley@arm.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 3310259SAndrew.Bardsley@arm.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 3410259SAndrew.Bardsley@arm.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 3510259SAndrew.Bardsley@arm.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 3610259SAndrew.Bardsley@arm.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 3710259SAndrew.Bardsley@arm.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 3810259SAndrew.Bardsley@arm.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 3910259SAndrew.Bardsley@arm.com * 4010259SAndrew.Bardsley@arm.com * Authors: Ali Saidi 4110259SAndrew.Bardsley@arm.com * Andreas Hansson 4210259SAndrew.Bardsley@arm.com */ 4310259SAndrew.Bardsley@arm.com 4410259SAndrew.Bardsley@arm.com#include "mem/tport.hh" 4510259SAndrew.Bardsley@arm.com#include "sim/sim_object.hh" 4610259SAndrew.Bardsley@arm.com 4710259SAndrew.Bardsley@arm.comSimpleTimingPort::SimpleTimingPort(const std::string& _name, 4810259SAndrew.Bardsley@arm.com SimObject* _owner) : 4910259SAndrew.Bardsley@arm.com QueuedSlavePort(_name, _owner, queueImpl), queueImpl(*_owner, *this) 5010259SAndrew.Bardsley@arm.com{ 5110259SAndrew.Bardsley@arm.com} 5210259SAndrew.Bardsley@arm.com 5310259SAndrew.Bardsley@arm.comvoid 5410259SAndrew.Bardsley@arm.comSimpleTimingPort::recvFunctional(PacketPtr pkt) 5510259SAndrew.Bardsley@arm.com{ 5610259SAndrew.Bardsley@arm.com if (!respQueue.trySatisfyFunctional(pkt)) { 5710259SAndrew.Bardsley@arm.com // do an atomic access and throw away the returned latency 5810259SAndrew.Bardsley@arm.com recvAtomic(pkt); 5910259SAndrew.Bardsley@arm.com } 6010259SAndrew.Bardsley@arm.com} 6110259SAndrew.Bardsley@arm.com 6210259SAndrew.Bardsley@arm.combool 6310259SAndrew.Bardsley@arm.comSimpleTimingPort::recvTimingReq(PacketPtr pkt) 6410259SAndrew.Bardsley@arm.com{ 6510259SAndrew.Bardsley@arm.com // the SimpleTimingPort should not be used anywhere where there is 6610259SAndrew.Bardsley@arm.com // a need to deal with snoop responses and their flow control 6710259SAndrew.Bardsley@arm.com // requirements 6810259SAndrew.Bardsley@arm.com if (pkt->cacheResponding()) 6910259SAndrew.Bardsley@arm.com panic("SimpleTimingPort should never see packets with the " 7010259SAndrew.Bardsley@arm.com "cacheResponding flag set\n"); 7110259SAndrew.Bardsley@arm.com 7210259SAndrew.Bardsley@arm.com bool needsResponse = pkt->needsResponse(); 7310259SAndrew.Bardsley@arm.com Tick latency = recvAtomic(pkt); 7410259SAndrew.Bardsley@arm.com // turn packet around to go back to requester if response expected 7510259SAndrew.Bardsley@arm.com if (needsResponse) { 7610259SAndrew.Bardsley@arm.com // recvAtomic() should already have turned packet into 7710259SAndrew.Bardsley@arm.com // atomic response 7810259SAndrew.Bardsley@arm.com assert(pkt->isResponse()); 7910259SAndrew.Bardsley@arm.com schedTimingResp(pkt, curTick() + latency); 8010259SAndrew.Bardsley@arm.com } else { 8110259SAndrew.Bardsley@arm.com // queue the packet for deletion 8210259SAndrew.Bardsley@arm.com pendingDelete.reset(pkt); 8310259SAndrew.Bardsley@arm.com } 8410259SAndrew.Bardsley@arm.com 8510259SAndrew.Bardsley@arm.com return true; 8610259SAndrew.Bardsley@arm.com} 8710259SAndrew.Bardsley@arm.com