CheckNextCycleAST.py revision 10981
11758Ssaidi@eecs.umich.edu# 21758Ssaidi@eecs.umich.edu# Copyright (c) 2013-15 Advanced Micro Devices, Inc. 31758Ssaidi@eecs.umich.edu# All rights reserved. 41758Ssaidi@eecs.umich.edu# 51758Ssaidi@eecs.umich.edu# Redistribution and use in source and binary forms, with or without 61758Ssaidi@eecs.umich.edu# modification, are permitted provided that the following conditions are 71758Ssaidi@eecs.umich.edu# met: redistributions of source code must retain the above copyright 81758Ssaidi@eecs.umich.edu# notice, this list of conditions and the following disclaimer; 91758Ssaidi@eecs.umich.edu# redistributions in binary form must reproduce the above copyright 101758Ssaidi@eecs.umich.edu# notice, this list of conditions and the following disclaimer in the 111758Ssaidi@eecs.umich.edu# documentation and/or other materials provided with the distribution; 121758Ssaidi@eecs.umich.edu# neither the name of the copyright holders nor the names of its 131758Ssaidi@eecs.umich.edu# contributors may be used to endorse or promote products derived from 141758Ssaidi@eecs.umich.edu# this software without specific prior written permission. 151758Ssaidi@eecs.umich.edu# 161758Ssaidi@eecs.umich.edu# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 171758Ssaidi@eecs.umich.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 181758Ssaidi@eecs.umich.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 191758Ssaidi@eecs.umich.edu# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 201758Ssaidi@eecs.umich.edu# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 211758Ssaidi@eecs.umich.edu# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 221758Ssaidi@eecs.umich.edu# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 231758Ssaidi@eecs.umich.edu# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 241758Ssaidi@eecs.umich.edu# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 251758Ssaidi@eecs.umich.edu# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262665Ssaidi@eecs.umich.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272665Ssaidi@eecs.umich.edu# 281758Ssaidi@eecs.umich.edu 291049Sbinkertn@umich.edufrom slicc.ast.StatementAST import StatementAST 301049Sbinkertn@umich.edu 311049Sbinkertn@umich.educlass CheckNextCycleAST(StatementAST): 321049Sbinkertn@umich.edu def __init__(self, slicc): 331049Sbinkertn@umich.edu super(CheckNextCycleAST, self).__init__(slicc) 341049Sbinkertn@umich.edu 351049Sbinkertn@umich.edu def __repr__(self): 361049Sbinkertn@umich.edu return "[CheckNextCycleAST]" 371049Sbinkertn@umich.edu 381049Sbinkertn@umich.edu def generate(self, code, return_type): 391049Sbinkertn@umich.edu code("scheduleEvent(Cycles(1));") 401049Sbinkertn@umich.edu return "CheckNextCycle" 411049Sbinkertn@umich.edu