Sequencer.hh revision 7039 
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#ifndef __MEM_RUBY_SYSTEM_SEQUENCER_HH__
30#define __MEM_RUBY_SYSTEM_SEQUENCER_HH__
31
32#include "mem/gems_common/Map.hh"
33#include "mem/protocol/AccessModeType.hh"
34#include "mem/protocol/CacheRequestType.hh"
35#include "mem/protocol/GenericMachineType.hh"
36#include "mem/protocol/PrefetchBit.hh"
37#include "mem/ruby/common/Address.hh"
38#include "mem/ruby/common/Consumer.hh"
39#include "mem/ruby/common/Global.hh"
40#include "mem/ruby/system/RubyPort.hh"
41
42class DataBlock;
43class CacheMsg;
44class MachineID;
45class CacheMemory;
46
47class RubySequencerParams;
48
49struct SequencerRequest
50{
51    RubyRequest ruby_request;
52    Time issue_time;
53
54    SequencerRequest(const RubyRequest & _ruby_request, Time _issue_time)
55        : ruby_request(_ruby_request), issue_time(_issue_time)
56    {}
57};
58
59std::ostream& operator<<(std::ostream& out, const SequencerRequest& obj);
60
61class Sequencer : public RubyPort, public Consumer
62{
63  public:
64    typedef RubySequencerParams Params;
65    Sequencer(const Params *);
66    ~Sequencer();
67
68    // Public Methods
69    void wakeup(); // Used only for deadlock detection
70
71    void printConfig(ostream& out) const;
72
73    void printProgress(ostream& out) const;
74
75    void writeCallback(const Address& address, DataBlock& data);
76    void readCallback(const Address& address, DataBlock& data);
77
78    RequestStatus makeRequest(const RubyRequest & request);
79    RequestStatus getRequestStatus(const RubyRequest& request);
80    bool empty() const;
81
82    void print(ostream& out) const;
83    void printStats(ostream & out) const;
84    void checkCoherence(const Address& address);
85
86    void removeRequest(SequencerRequest* request);
87
88  private:
89    bool tryCacheAccess(const Address& addr, CacheRequestType type,
90                        const Address& pc, AccessModeType access_mode,
91                        int size, DataBlock*& data_ptr);
92    void issueRequest(const RubyRequest& request);
93
94    void hitCallback(SequencerRequest* request, DataBlock& data);
95    bool insertRequest(SequencerRequest* request);
96
97
98    // Private copy constructor and assignment operator
99    Sequencer(const Sequencer& obj);
100    Sequencer& operator=(const Sequencer& obj);
101
102  private:
103    int m_max_outstanding_requests;
104    int m_deadlock_threshold;
105
106    CacheMemory* m_dataCache_ptr;
107    CacheMemory* m_instCache_ptr;
108
109    Map<Address, SequencerRequest*> m_writeRequestTable;
110    Map<Address, SequencerRequest*> m_readRequestTable;
111    // Global outstanding request count, across all request tables
112    int m_outstanding_count;
113    bool m_deadlock_check_scheduled;
114
115    int m_store_waiting_on_load_cycles;
116    int m_store_waiting_on_store_cycles;
117    int m_load_waiting_on_store_cycles;
118    int m_load_waiting_on_load_cycles;
119
120    bool m_usingRubyTester;
121
122    class SequencerWakeupEvent : public Event
123    {
124      private:
125        Sequencer *m_sequencer_ptr;
126
127      public:
128        SequencerWakeupEvent(Sequencer *_seq) : m_sequencer_ptr(_seq) {}
129        void process() { m_sequencer_ptr->wakeup(); }
130        const char *description() const { return "Sequencer deadlock check"; }
131    };
132
133    SequencerWakeupEvent deadlockCheckEvent;
134};
135
136inline ostream&
137operator<<(ostream& out, const Sequencer& obj)
138{
139    obj.print(out);
140    out << flush;
141    return out;
142}
143
144#endif // __MEM_RUBY_SYSTEM_SEQUENCER_HH__
145
146