Sequencer.cc revision 7455:586f99bf0dc4 
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include "base/str.hh"
30#include "cpu/rubytest/RubyTester.hh"
31#include "mem/protocol/CacheMsg.hh"
32#include "mem/protocol/Protocol.hh"
33#include "mem/protocol/Protocol.hh"
34#include "mem/ruby/buffers/MessageBuffer.hh"
35#include "mem/ruby/common/Global.hh"
36#include "mem/ruby/common/SubBlock.hh"
37#include "mem/ruby/libruby.hh"
38#include "mem/ruby/profiler/Profiler.hh"
39#include "mem/ruby/recorder/Tracer.hh"
40#include "mem/ruby/slicc_interface/AbstractController.hh"
41#include "mem/ruby/system/CacheMemory.hh"
42#include "mem/ruby/system/Sequencer.hh"
43#include "mem/ruby/system/System.hh"
44#include "params/RubySequencer.hh"
45
46using namespace std;
47
48Sequencer *
49RubySequencerParams::create()
50{
51    return new Sequencer(this);
52}
53
54Sequencer::Sequencer(const Params *p)
55    : RubyPort(p), deadlockCheckEvent(this)
56{
57    m_store_waiting_on_load_cycles = 0;
58    m_store_waiting_on_store_cycles = 0;
59    m_load_waiting_on_store_cycles = 0;
60    m_load_waiting_on_load_cycles = 0;
61
62    m_outstanding_count = 0;
63
64    m_max_outstanding_requests = 0;
65    m_deadlock_threshold = 0;
66    m_instCache_ptr = NULL;
67    m_dataCache_ptr = NULL;
68
69    m_instCache_ptr = p->icache;
70    m_dataCache_ptr = p->dcache;
71    m_max_outstanding_requests = p->max_outstanding_requests;
72    m_deadlock_threshold = p->deadlock_threshold;
73    m_usingRubyTester = p->using_ruby_tester;
74
75    assert(m_max_outstanding_requests > 0);
76    assert(m_deadlock_threshold > 0);
77    assert(m_instCache_ptr != NULL);
78    assert(m_dataCache_ptr != NULL);
79}
80
81Sequencer::~Sequencer()
82{
83}
84
85void
86Sequencer::wakeup()
87{
88    // Check for deadlock of any of the requests
89    Time current_time = g_eventQueue_ptr->getTime();
90
91    // Check across all outstanding requests
92    int total_outstanding = 0;
93
94    RequestTable::iterator read = m_readRequestTable.begin();
95    RequestTable::iterator read_end = m_readRequestTable.end();
96    for (; read != read_end; ++read) {
97        SequencerRequest* request = read->second;
98        if (current_time - request->issue_time < m_deadlock_threshold)
99            continue;
100
101        WARN_MSG("Possible Deadlock detected");
102        WARN_EXPR(request);
103        WARN_EXPR(m_version);
104        WARN_EXPR(request->ruby_request.paddr);
105        WARN_EXPR(m_readRequestTable.size());
106        WARN_EXPR(current_time);
107        WARN_EXPR(request->issue_time);
108        WARN_EXPR(current_time - request->issue_time);
109        ERROR_MSG("Aborting");
110    }
111
112    RequestTable::iterator write = m_writeRequestTable.begin();
113    RequestTable::iterator write_end = m_writeRequestTable.end();
114    for (; write != write_end; ++write) {
115        SequencerRequest* request = write->second;
116        if (current_time - request->issue_time < m_deadlock_threshold)
117            continue;
118
119        WARN_MSG("Possible Deadlock detected");
120        WARN_EXPR(request);
121        WARN_EXPR(m_version);
122        WARN_EXPR(current_time);
123        WARN_EXPR(request->issue_time);
124        WARN_EXPR(current_time - request->issue_time);
125        WARN_EXPR(m_writeRequestTable.size());
126        ERROR_MSG("Aborting");
127    }
128
129    total_outstanding += m_writeRequestTable.size();
130    total_outstanding += m_readRequestTable.size();
131
132    assert(m_outstanding_count == total_outstanding);
133
134    if (m_outstanding_count > 0) {
135        // If there are still outstanding requests, keep checking
136        schedule(deadlockCheckEvent,
137                 m_deadlock_threshold * g_eventQueue_ptr->getClock() +
138                 curTick);
139    }
140}
141
142void
143Sequencer::printStats(ostream & out) const
144{
145    out << "Sequencer: " << m_name << endl
146        << "  store_waiting_on_load_cycles: "
147        << m_store_waiting_on_load_cycles << endl
148        << "  store_waiting_on_store_cycles: "
149        << m_store_waiting_on_store_cycles << endl
150        << "  load_waiting_on_load_cycles: "
151        << m_load_waiting_on_load_cycles << endl
152        << "  load_waiting_on_store_cycles: "
153        << m_load_waiting_on_store_cycles << endl;
154}
155
156void
157Sequencer::printProgress(ostream& out) const
158{
159#if 0
160    int total_demand = 0;
161    out << "Sequencer Stats Version " << m_version << endl;
162    out << "Current time = " << g_eventQueue_ptr->getTime() << endl;
163    out << "---------------" << endl;
164    out << "outstanding requests" << endl;
165
166    out << "proc " << m_Read
167        << " version Requests = " << m_readRequestTable.size() << endl;
168
169    // print the request table
170    RequestTable::iterator read = m_readRequestTable.begin();
171    RequestTable::iterator read_end = m_readRequestTable.end();
172    for (; read != read_end; ++read) {
173        SequencerRequest* request = read->second;
174        out << "\tRequest[ " << i << " ] = " << request->type
175            << " Address " << rkeys[i]
176            << " Posted " << request->issue_time
177            << " PF " << PrefetchBit_No << endl;
178        total_demand++;
179    }
180
181    out << "proc " << m_version
182        << " Write Requests = " << m_writeRequestTable.size << endl;
183
184    // print the request table
185    RequestTable::iterator write = m_writeRequestTable.begin();
186    RequestTable::iterator write_end = m_writeRequestTable.end();
187    for (; write != write_end; ++write) {
188        SequencerRequest* request = write->second;
189        out << "\tRequest[ " << i << " ] = " << request.getType()
190            << " Address " << wkeys[i]
191            << " Posted " << request.getTime()
192            << " PF " << request.getPrefetch() << endl;
193        if (request.getPrefetch() == PrefetchBit_No) {
194            total_demand++;
195        }
196    }
197
198    out << endl;
199
200    out << "Total Number Outstanding: " << m_outstanding_count << endl
201        << "Total Number Demand     : " << total_demand << endl
202        << "Total Number Prefetches : " << m_outstanding_count - total_demand
203        << endl << endl << endl;
204#endif
205}
206
207void
208Sequencer::printConfig(ostream& out) const
209{
210    out << "Seqeuncer config: " << m_name << endl
211        << "  controller: " << m_controller->getName() << endl
212        << "  version: " << m_version << endl
213        << "  max_outstanding_requests: " << m_max_outstanding_requests << endl
214        << "  deadlock_threshold: " << m_deadlock_threshold << endl;
215}
216
217// Insert the request on the correct request table.  Return true if
218// the entry was already present.
219bool
220Sequencer::insertRequest(SequencerRequest* request)
221{
222    int total_outstanding =
223        m_writeRequestTable.size() + m_readRequestTable.size();
224
225    assert(m_outstanding_count == total_outstanding);
226
227    // See if we should schedule a deadlock check
228    if (deadlockCheckEvent.scheduled() == false) {
229        schedule(deadlockCheckEvent, m_deadlock_threshold + curTick);
230    }
231
232    Address line_addr(request->ruby_request.paddr);
233    line_addr.makeLineAddress();
234    if ((request->ruby_request.type == RubyRequestType_ST) ||
235        (request->ruby_request.type == RubyRequestType_RMW_Read) ||
236        (request->ruby_request.type == RubyRequestType_RMW_Write) ||
237        (request->ruby_request.type == RubyRequestType_Locked_Read) ||
238        (request->ruby_request.type == RubyRequestType_Locked_Write)) {
239        pair<RequestTable::iterator, bool> r =
240            m_writeRequestTable.insert(RequestTable::value_type(line_addr, 0));
241        bool success = r.second;
242        RequestTable::iterator i = r.first;
243        if (!success) {
244            i->second = request;
245            // return true;
246
247            // drh5: isn't this an error?  do you lose the initial request?
248            assert(0);
249        }
250        i->second = request;
251        m_outstanding_count++;
252    } else {
253        pair<RequestTable::iterator, bool> r =
254            m_readRequestTable.insert(RequestTable::value_type(line_addr, 0));
255        bool success = r.second;
256        RequestTable::iterator i = r.first;
257        if (!success) {
258            i->second = request;
259            // return true;
260
261            // drh5: isn't this an error?  do you lose the initial request?
262            assert(0);
263        }
264        i->second = request;
265        m_outstanding_count++;
266    }
267
268    g_system_ptr->getProfiler()->sequencerRequests(m_outstanding_count);
269
270    total_outstanding = m_writeRequestTable.size() + m_readRequestTable.size();
271    assert(m_outstanding_count == total_outstanding);
272
273    return false;
274}
275
276void
277Sequencer::markRemoved()
278{
279    m_outstanding_count--;
280    assert(m_outstanding_count ==
281           m_writeRequestTable.size() + m_readRequestTable.size());
282}
283
284void
285Sequencer::removeRequest(SequencerRequest* srequest)
286{
287    assert(m_outstanding_count ==
288           m_writeRequestTable.size() + m_readRequestTable.size());
289
290    const RubyRequest & ruby_request = srequest->ruby_request;
291    Address line_addr(ruby_request.paddr);
292    line_addr.makeLineAddress();
293    if ((ruby_request.type == RubyRequestType_ST) ||
294        (ruby_request.type == RubyRequestType_RMW_Read) ||
295        (ruby_request.type == RubyRequestType_RMW_Write) ||
296        (ruby_request.type == RubyRequestType_Locked_Read) ||
297        (ruby_request.type == RubyRequestType_Locked_Write)) {
298        m_writeRequestTable.erase(line_addr);
299    } else {
300        m_readRequestTable.erase(line_addr);
301    }
302
303    markRemoved();
304}
305
306void
307Sequencer::writeCallback(const Address& address, DataBlock& data)
308{
309    assert(address == line_address(address));
310    assert(m_writeRequestTable.count(line_address(address)));
311
312    RequestTable::iterator i = m_writeRequestTable.find(address);
313    assert(i != m_writeRequestTable.end());
314    SequencerRequest* request = i->second;
315
316    m_writeRequestTable.erase(i);
317    markRemoved();
318
319    assert((request->ruby_request.type == RubyRequestType_ST) ||
320           (request->ruby_request.type == RubyRequestType_RMW_Read) ||
321           (request->ruby_request.type == RubyRequestType_RMW_Write) ||
322           (request->ruby_request.type == RubyRequestType_Locked_Read) ||
323           (request->ruby_request.type == RubyRequestType_Locked_Write));
324
325    if (request->ruby_request.type == RubyRequestType_Locked_Read) {
326        m_dataCache_ptr->setLocked(address, m_version);
327    } else if (request->ruby_request.type == RubyRequestType_RMW_Read) {
328        m_controller->blockOnQueue(address, m_mandatory_q_ptr);
329    } else if (request->ruby_request.type == RubyRequestType_RMW_Write) {
330        m_controller->unblock(address);
331    }
332
333    hitCallback(request, data);
334}
335
336void
337Sequencer::readCallback(const Address& address, DataBlock& data)
338{
339    assert(address == line_address(address));
340    assert(m_readRequestTable.count(line_address(address)));
341
342    RequestTable::iterator i = m_readRequestTable.find(address);
343    assert(i != m_readRequestTable.end());
344    SequencerRequest* request = i->second;
345
346    m_readRequestTable.erase(i);
347    markRemoved();
348
349    assert((request->ruby_request.type == RubyRequestType_LD) ||
350           (request->ruby_request.type == RubyRequestType_RMW_Read) ||
351           (request->ruby_request.type == RubyRequestType_IFETCH));
352
353    hitCallback(request, data);
354}
355
356void
357Sequencer::hitCallback(SequencerRequest* srequest, DataBlock& data)
358{
359    const RubyRequest & ruby_request = srequest->ruby_request;
360    Address request_address(ruby_request.paddr);
361    Address request_line_address(ruby_request.paddr);
362    request_line_address.makeLineAddress();
363    RubyRequestType type = ruby_request.type;
364    Time issued_time = srequest->issue_time;
365
366    // Set this cache entry to the most recently used
367    if (type == RubyRequestType_IFETCH) {
368        if (m_instCache_ptr->isTagPresent(request_line_address))
369            m_instCache_ptr->setMRU(request_line_address);
370    } else {
371        if (m_dataCache_ptr->isTagPresent(request_line_address))
372            m_dataCache_ptr->setMRU(request_line_address);
373    }
374
375    assert(g_eventQueue_ptr->getTime() >= issued_time);
376    Time miss_latency = g_eventQueue_ptr->getTime() - issued_time;
377
378    // Profile the miss latency for all non-zero demand misses
379    if (miss_latency != 0) {
380        g_system_ptr->getProfiler()->missLatency(miss_latency, type);
381
382        if (Debug::getProtocolTrace()) {
383            g_system_ptr->getProfiler()->
384                profileTransition("Seq", m_version,
385                                  Address(ruby_request.paddr), "", "Done", "",
386                                  csprintf("%d cycles", miss_latency));
387        }
388    }
389#if 0
390    if (request.getPrefetch() == PrefetchBit_Yes) {
391        return; // Ignore the prefetch
392    }
393#endif
394
395    // update the data
396    if (ruby_request.data != NULL) {
397        if ((type == RubyRequestType_LD) ||
398            (type == RubyRequestType_IFETCH) ||
399            (type == RubyRequestType_RMW_Read) ||
400            (type == RubyRequestType_Locked_Read)) {
401
402            memcpy(ruby_request.data,
403                   data.getData(request_address.getOffset(), ruby_request.len),
404                   ruby_request.len);
405        } else {
406            data.setData(ruby_request.data, request_address.getOffset(),
407                         ruby_request.len);
408        }
409    } else {
410        DPRINTF(MemoryAccess,
411                "WARNING.  Data not transfered from Ruby to M5 for type %s\n",
412                RubyRequestType_to_string(type));
413    }
414
415    // If using the RubyTester, update the RubyTester sender state's
416    // subBlock with the recieved data.  The tester will later access
417    // this state.
418    // Note: RubyPort will access it's sender state before the
419    // RubyTester.
420    if (m_usingRubyTester) {
421        RubyPort::SenderState *requestSenderState =
422            safe_cast<RubyPort::SenderState*>(ruby_request.pkt->senderState);
423        RubyTester::SenderState* testerSenderState =
424            safe_cast<RubyTester::SenderState*>(requestSenderState->saved);
425        testerSenderState->subBlock->mergeFrom(data);
426    }
427
428    ruby_hit_callback(ruby_request.pkt);
429    delete srequest;
430}
431
432// Returns true if the sequencer already has a load or store outstanding
433RequestStatus
434Sequencer::getRequestStatus(const RubyRequest& request)
435{
436    bool is_outstanding_store =
437        !!m_writeRequestTable.count(line_address(Address(request.paddr)));
438    bool is_outstanding_load =
439        !!m_readRequestTable.count(line_address(Address(request.paddr)));
440    if (is_outstanding_store) {
441        if ((request.type == RubyRequestType_LD) ||
442            (request.type == RubyRequestType_IFETCH) ||
443            (request.type == RubyRequestType_RMW_Read)) {
444            m_store_waiting_on_load_cycles++;
445        } else {
446            m_store_waiting_on_store_cycles++;
447        }
448        return RequestStatus_Aliased;
449    } else if (is_outstanding_load) {
450        if ((request.type == RubyRequestType_ST) ||
451            (request.type == RubyRequestType_RMW_Write)) {
452            m_load_waiting_on_store_cycles++;
453        } else {
454            m_load_waiting_on_load_cycles++;
455        }
456        return RequestStatus_Aliased;
457    }
458
459    if (m_outstanding_count >= m_max_outstanding_requests) {
460        return RequestStatus_BufferFull;
461    }
462
463    return RequestStatus_Ready;
464}
465
466bool
467Sequencer::empty() const
468{
469    return m_writeRequestTable.empty() && m_readRequestTable.empty();
470}
471
472RequestStatus
473Sequencer::makeRequest(const RubyRequest &request)
474{
475    assert(Address(request.paddr).getOffset() + request.len <=
476           RubySystem::getBlockSizeBytes());
477    RequestStatus status = getRequestStatus(request);
478    if (status != RequestStatus_Ready)
479        return status;
480
481    SequencerRequest *srequest =
482        new SequencerRequest(request, g_eventQueue_ptr->getTime());
483    bool found = insertRequest(srequest);
484    if (found) {
485        panic("Sequencer::makeRequest should never be called if the "
486              "request is already outstanding\n");
487        return RequestStatus_NULL;
488    }
489
490    if (request.type == RubyRequestType_Locked_Write) {
491        // NOTE: it is OK to check the locked flag here as the
492        // mandatory queue will be checked first ensuring that nothing
493        // comes between checking the flag and servicing the store.
494
495        Address line_addr = line_address(Address(request.paddr));
496        if (!m_dataCache_ptr->isLocked(line_addr, m_version)) {
497            removeRequest(srequest);
498            if (Debug::getProtocolTrace()) {
499                g_system_ptr->getProfiler()->
500                    profileTransition("Seq", m_version,
501                                      Address(request.paddr),
502                                      "", "SC Fail", "",
503                                      RubyRequestType_to_string(request.type));
504            }
505            return RequestStatus_LlscFailed;
506        } else {
507            m_dataCache_ptr->clearLocked(line_addr);
508        }
509    }
510    issueRequest(request);
511
512    // TODO: issue hardware prefetches here
513    return RequestStatus_Issued;
514}
515
516void
517Sequencer::issueRequest(const RubyRequest& request)
518{
519    // TODO: get rid of CacheMsg, CacheRequestType, and
520    // AccessModeTYpe, & have SLICC use RubyRequest and subtypes
521    // natively
522    CacheRequestType ctype;
523    switch(request.type) {
524      case RubyRequestType_IFETCH:
525        ctype = CacheRequestType_IFETCH;
526        break;
527      case RubyRequestType_LD:
528        ctype = CacheRequestType_LD;
529        break;
530      case RubyRequestType_ST:
531        ctype = CacheRequestType_ST;
532        break;
533      case RubyRequestType_Locked_Read:
534      case RubyRequestType_Locked_Write:
535        ctype = CacheRequestType_ATOMIC;
536        break;
537      case RubyRequestType_RMW_Read:
538        ctype = CacheRequestType_ATOMIC;
539        break;
540      case RubyRequestType_RMW_Write:
541        ctype = CacheRequestType_ATOMIC;
542        break;
543      default:
544        assert(0);
545    }
546
547    AccessModeType amtype;
548    switch(request.access_mode){
549      case RubyAccessMode_User:
550        amtype = AccessModeType_UserMode;
551        break;
552      case RubyAccessMode_Supervisor:
553        amtype = AccessModeType_SupervisorMode;
554        break;
555      case RubyAccessMode_Device:
556        amtype = AccessModeType_UserMode;
557        break;
558      default:
559        assert(0);
560    }
561
562    Address line_addr(request.paddr);
563    line_addr.makeLineAddress();
564    CacheMsg *msg = new CacheMsg(line_addr, Address(request.paddr), ctype,
565        Address(request.pc), amtype, request.len, PrefetchBit_No,
566        request.proc_id);
567
568    if (Debug::getProtocolTrace()) {
569        g_system_ptr->getProfiler()->
570            profileTransition("Seq", m_version, Address(request.paddr),
571                              "", "Begin", "",
572                              RubyRequestType_to_string(request.type));
573    }
574
575    if (g_system_ptr->getTracer()->traceEnabled()) {
576        g_system_ptr->getTracer()->
577            traceRequest(this, line_addr, Address(request.pc),
578                         request.type, g_eventQueue_ptr->getTime());
579    }
580
581    Time latency = 0;  // initialzed to an null value
582
583    if (request.type == RubyRequestType_IFETCH)
584        latency = m_instCache_ptr->getLatency();
585    else
586        latency = m_dataCache_ptr->getLatency();
587
588    // Send the message to the cache controller
589    assert(latency > 0);
590
591    assert(m_mandatory_q_ptr != NULL);
592    m_mandatory_q_ptr->enqueue(msg, latency);
593}
594
595#if 0
596bool
597Sequencer::tryCacheAccess(const Address& addr, CacheRequestType type,
598                          AccessModeType access_mode,
599                          int size, DataBlock*& data_ptr)
600{
601    CacheMemory *cache =
602        (type == CacheRequestType_IFETCH) ? m_instCache_ptr : m_dataCache_ptr;
603
604    return cache->tryCacheAccess(line_address(addr), type, data_ptr);
605}
606#endif
607
608template <class KEY, class VALUE>
609std::ostream &
610operator<<(ostream &out, const m5::hash_map<KEY, VALUE> &map)
611{
612    typename m5::hash_map<KEY, VALUE>::const_iterator i = map.begin();
613    typename m5::hash_map<KEY, VALUE>::const_iterator end = map.end();
614
615    out << "[";
616    for (; i != end; ++i)
617        out << " " << i->first << "=" << i->second;
618    out << " ]";
619
620    return out;
621}
622
623void
624Sequencer::print(ostream& out) const
625{
626    out << "[Sequencer: " << m_version
627        << ", outstanding requests: " << m_outstanding_count
628        << ", read request table: " << m_readRequestTable
629        << ", write request table: " << m_writeRequestTable
630        << "]";
631}
632
633// this can be called from setState whenever coherence permissions are
634// upgraded when invoked, coherence violations will be checked for the
635// given block
636void
637Sequencer::checkCoherence(const Address& addr)
638{
639#ifdef CHECK_COHERENCE
640    g_system_ptr->checkGlobalCoherenceInvariant(addr);
641#endif
642}
643