RubyPort.hh revision 7055
16876Ssteve.reinhardt@amd.com/* 26876Ssteve.reinhardt@amd.com * Copyright (c) 2009 Advanced Micro Devices, Inc. 36876Ssteve.reinhardt@amd.com * All rights reserved. 46876Ssteve.reinhardt@amd.com * 56876Ssteve.reinhardt@amd.com * Redistribution and use in source and binary forms, with or without 66876Ssteve.reinhardt@amd.com * modification, are permitted provided that the following conditions are 76876Ssteve.reinhardt@amd.com * met: redistributions of source code must retain the above copyright 86876Ssteve.reinhardt@amd.com * notice, this list of conditions and the following disclaimer; 96876Ssteve.reinhardt@amd.com * redistributions in binary form must reproduce the above copyright 106876Ssteve.reinhardt@amd.com * notice, this list of conditions and the following disclaimer in the 116876Ssteve.reinhardt@amd.com * documentation and/or other materials provided with the distribution; 126876Ssteve.reinhardt@amd.com * neither the name of the copyright holders nor the names of its 136876Ssteve.reinhardt@amd.com * contributors may be used to endorse or promote products derived from 146876Ssteve.reinhardt@amd.com * this software without specific prior written permission. 156876Ssteve.reinhardt@amd.com * 166876Ssteve.reinhardt@amd.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 176876Ssteve.reinhardt@amd.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 186876Ssteve.reinhardt@amd.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 196876Ssteve.reinhardt@amd.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 206876Ssteve.reinhardt@amd.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 216876Ssteve.reinhardt@amd.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 226876Ssteve.reinhardt@amd.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 236876Ssteve.reinhardt@amd.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 246876Ssteve.reinhardt@amd.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 256876Ssteve.reinhardt@amd.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 266876Ssteve.reinhardt@amd.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 276876Ssteve.reinhardt@amd.com */ 286876Ssteve.reinhardt@amd.com 297039Snate@binkert.org#ifndef __MEM_RUBY_SYSTEM_RUBYPORT_HH__ 307039Snate@binkert.org#define __MEM_RUBY_SYSTEM_RUBYPORT_HH__ 316285Snate@binkert.org 327039Snate@binkert.org#include <cassert> 336285Snate@binkert.org#include <string> 346285Snate@binkert.org 356876Ssteve.reinhardt@amd.com#include "mem/mem_object.hh" 366893SBrad.Beckmann@amd.com#include "mem/physical.hh" 376922SBrad.Beckmann@amd.com#include "mem/protocol/RequestStatus.hh" 387039Snate@binkert.org#include "mem/ruby/libruby.hh" 397039Snate@binkert.org#include "mem/tport.hh" 406876Ssteve.reinhardt@amd.com#include "params/RubyPort.hh" 416876Ssteve.reinhardt@amd.com 426876Ssteve.reinhardt@amd.comclass MessageBuffer; 436876Ssteve.reinhardt@amd.comclass AbstractController; 446876Ssteve.reinhardt@amd.com 457039Snate@binkert.orgclass RubyPort : public MemObject 467039Snate@binkert.org{ 477039Snate@binkert.org public: 486882SBrad.Beckmann@amd.com class M5Port : public SimpleTimingPort 496882SBrad.Beckmann@amd.com { 507039Snate@binkert.org private: 516882SBrad.Beckmann@amd.com RubyPort *ruby_port; 526882SBrad.Beckmann@amd.com 536882SBrad.Beckmann@amd.com public: 547039Snate@binkert.org M5Port(const std::string &_name, RubyPort *_port); 556882SBrad.Beckmann@amd.com bool sendTiming(PacketPtr pkt); 566882SBrad.Beckmann@amd.com void hitCallback(PacketPtr pkt); 576882SBrad.Beckmann@amd.com 586882SBrad.Beckmann@amd.com protected: 596882SBrad.Beckmann@amd.com virtual bool recvTiming(PacketPtr pkt); 606882SBrad.Beckmann@amd.com virtual Tick recvAtomic(PacketPtr pkt); 616882SBrad.Beckmann@amd.com 626882SBrad.Beckmann@amd.com private: 636882SBrad.Beckmann@amd.com bool isPhysMemAddress(Addr addr); 646882SBrad.Beckmann@amd.com }; 656882SBrad.Beckmann@amd.com 666882SBrad.Beckmann@amd.com friend class M5Port; 676882SBrad.Beckmann@amd.com 686882SBrad.Beckmann@amd.com class PioPort : public SimpleTimingPort 696882SBrad.Beckmann@amd.com { 707039Snate@binkert.org private: 716882SBrad.Beckmann@amd.com RubyPort *ruby_port; 726882SBrad.Beckmann@amd.com 736882SBrad.Beckmann@amd.com public: 747039Snate@binkert.org PioPort(const std::string &_name, RubyPort *_port); 756882SBrad.Beckmann@amd.com bool sendTiming(PacketPtr pkt); 766882SBrad.Beckmann@amd.com 776882SBrad.Beckmann@amd.com protected: 786882SBrad.Beckmann@amd.com virtual bool recvTiming(PacketPtr pkt); 796882SBrad.Beckmann@amd.com virtual Tick recvAtomic(PacketPtr pkt); 806882SBrad.Beckmann@amd.com }; 816882SBrad.Beckmann@amd.com 826882SBrad.Beckmann@amd.com friend class PioPort; 836882SBrad.Beckmann@amd.com 846882SBrad.Beckmann@amd.com struct SenderState : public Packet::SenderState 856882SBrad.Beckmann@amd.com { 866882SBrad.Beckmann@amd.com M5Port* port; 876882SBrad.Beckmann@amd.com Packet::SenderState *saved; 886882SBrad.Beckmann@amd.com 897039Snate@binkert.org SenderState(M5Port* _port, Packet::SenderState *sender_state = NULL) 906882SBrad.Beckmann@amd.com : port(_port), saved(sender_state) 916882SBrad.Beckmann@amd.com {} 926882SBrad.Beckmann@amd.com }; 936882SBrad.Beckmann@amd.com 946876Ssteve.reinhardt@amd.com typedef RubyPortParams Params; 956876Ssteve.reinhardt@amd.com RubyPort(const Params *p); 966882SBrad.Beckmann@amd.com virtual ~RubyPort() {} 976882SBrad.Beckmann@amd.com 986882SBrad.Beckmann@amd.com void init(); 996285Snate@binkert.org 1006876Ssteve.reinhardt@amd.com Port *getPort(const std::string &if_name, int idx); 1016876Ssteve.reinhardt@amd.com 1026922SBrad.Beckmann@amd.com virtual RequestStatus makeRequest(const RubyRequest & request) = 0; 1036882SBrad.Beckmann@amd.com 1046882SBrad.Beckmann@amd.com // 1056882SBrad.Beckmann@amd.com // Called by the controller to give the sequencer a pointer. 1066882SBrad.Beckmann@amd.com // A pointer to the controller is needed for atomic support. 1076882SBrad.Beckmann@amd.com // 1086882SBrad.Beckmann@amd.com void setController(AbstractController* _cntrl) { m_controller = _cntrl; } 1096285Snate@binkert.org 1107039Snate@binkert.org protected: 1117055Snate@binkert.org const std::string m_name; 1127039Snate@binkert.org void ruby_hit_callback(PacketPtr pkt); 1137039Snate@binkert.org void hit(PacketPtr pkt); 1146285Snate@binkert.org 1157039Snate@binkert.org int m_version; 1167039Snate@binkert.org AbstractController* m_controller; 1177039Snate@binkert.org MessageBuffer* m_mandatory_q_ptr; 1186882SBrad.Beckmann@amd.com PioPort* pio_port; 1196876Ssteve.reinhardt@amd.com 1207039Snate@binkert.org private: 1216922SBrad.Beckmann@amd.com uint16_t m_port_id; 1226922SBrad.Beckmann@amd.com uint64_t m_request_cnt; 1236882SBrad.Beckmann@amd.com 1246893SBrad.Beckmann@amd.com M5Port* physMemPort; 1256893SBrad.Beckmann@amd.com 1266893SBrad.Beckmann@amd.com PhysicalMemory* physmem; 1276285Snate@binkert.org}; 1286285Snate@binkert.org 1297039Snate@binkert.org#endif // __MEM_RUBY_SYSTEM_RUBYPORT_HH__ 130