AbstractController.hh revision 9497:2759161b9d7f
1/*
2 * Copyright (c) 2009 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#ifndef __MEM_RUBY_SLICC_INTERFACE_ABSTRACTCONTROLLER_HH__
30#define __MEM_RUBY_SLICC_INTERFACE_ABSTRACTCONTROLLER_HH__
31
32#include <iostream>
33#include <string>
34
35#include "mem/protocol/AccessPermission.hh"
36#include "mem/ruby/common/Address.hh"
37#include "mem/ruby/common/Consumer.hh"
38#include "mem/ruby/common/DataBlock.hh"
39#include "mem/ruby/common/Histogram.hh"
40#include "mem/ruby/network/Network.hh"
41#include "mem/ruby/recorder/CacheRecorder.hh"
42#include "mem/ruby/system/MachineID.hh"
43#include "mem/packet.hh"
44#include "params/RubyController.hh"
45#include "sim/clocked_object.hh"
46
47class MessageBuffer;
48class Network;
49
50class AbstractController : public ClockedObject, public Consumer
51{
52  public:
53    typedef RubyControllerParams Params;
54    AbstractController(const Params *p);
55    void init();
56    const Params *params() const { return (const Params *)_params; }
57    virtual MessageBuffer* getMandatoryQueue() const = 0;
58    virtual const int & getVersion() const = 0;
59    virtual const std::string toString() const = 0;  // returns text version of
60                                                     // controller type
61    virtual const std::string getName() const = 0;   // return instance name
62    virtual void blockOnQueue(Address, MessageBuffer*) = 0;
63    virtual void unblock(Address) = 0;
64    virtual void initNetworkPtr(Network* net_ptr) = 0;
65    virtual AccessPermission getAccessPermission(const Address& addr) = 0;
66    virtual DataBlock& getDataBlock(const Address& addr) = 0;
67
68    virtual void print(std::ostream & out) const = 0;
69    virtual void printStats(std::ostream & out) const = 0;
70    virtual void wakeup() = 0;
71    //  virtual void dumpStats(std::ostream & out) = 0;
72    virtual void clearStats() = 0;
73    virtual void recordCacheTrace(int cntrl, CacheRecorder* tr) = 0;
74    virtual Sequencer* getSequencer() const = 0;
75
76    //! These functions are used by ruby system to read/write the message
77    //! queues that exist with in the controller.
78    //! The boolean return value indicates if the read was performed
79    //! successfully.
80    virtual bool functionalReadBuffers(PacketPtr&) = 0;
81    //! The return value indicates the number of messages written with the
82    //! data from the packet.
83    virtual uint32_t functionalWriteBuffers(PacketPtr&) = 0;
84
85    //! Function for enqueuing a prefetch request
86    virtual void enqueuePrefetch(const Address&, const RubyRequestType&)
87    { fatal("Prefetches not implemented!");}
88
89  public:
90    MachineID getMachineID() const { return m_machineID; }
91    uint64_t getFullyBusyCycles() const { return m_fully_busy_cycles; }
92    uint64_t getRequestCount() const { return m_request_count; }
93    const std::map<std::string, uint64_t>& getRequestProfileMap() const
94    { return m_requestProfileMap; }
95
96    Histogram& getDelayHist() { return m_delayHistogram; }
97    Histogram& getDelayVCHist(uint32_t index)
98    { return m_delayVCHistogram[index]; }
99
100  protected:
101    //! Profiles original cache requests including PUTs
102    void profileRequest(const std::string &request);
103    //! Profiles the delay associated with messages.
104    void profileMsgDelay(uint32_t virtualNetwork, Time delay);
105
106  protected:
107    int m_transitions_per_cycle;
108    int m_buffer_size;
109    int m_recycle_latency;
110    std::string m_name;
111    NodeID m_version;
112    Network* m_net_ptr;
113    MachineID m_machineID;
114    bool m_is_blocking;
115    std::map<Address, MessageBuffer*> m_block_map;
116    typedef std::vector<MessageBuffer*> MsgVecType;
117    typedef std::map< Address, MsgVecType* > WaitingBufType;
118    WaitingBufType m_waiting_buffers;
119    int m_max_in_port_rank;
120    int m_cur_in_port_rank;
121    int m_number_of_TBEs;
122
123    //! Counter for the number of cycles when the transitions carried out
124    //! were equal to the maximum allowed
125    uint64_t m_fully_busy_cycles;
126
127    //! Map for couting requests of different types. The controller should
128    //! call requisite function for updating the count.
129    std::map<std::string, uint64_t> m_requestProfileMap;
130    uint64_t m_request_count;
131
132    //! Histogram for profiling delay for the messages this controller
133    //! cares for
134    Histogram m_delayHistogram;
135    std::vector<Histogram> m_delayVCHistogram;
136};
137
138#endif // __MEM_RUBY_SLICC_INTERFACE_ABSTRACTCONTROLLER_HH__
139