Profiler.hh revision 9507:d2ab6d889fc7
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/*
30   This file has been modified by Kevin Moore and Dan Nussbaum of the
31   Scalable Systems Research Group at Sun Microsystems Laboratories
32   (http://research.sun.com/scalable/) to support the Adaptive
33   Transactional Memory Test Platform (ATMTP).
34
35   Please send email to atmtp-interest@sun.com with feedback, questions, or
36   to request future announcements about ATMTP.
37
38   ----------------------------------------------------------------------
39
40   File modification date: 2008-02-23
41
42   ----------------------------------------------------------------------
43*/
44
45#ifndef __MEM_RUBY_PROFILER_PROFILER_HH__
46#define __MEM_RUBY_PROFILER_PROFILER_HH__
47
48#include <iostream>
49#include <map>
50#include <string>
51#include <vector>
52
53#include "base/hashmap.hh"
54#include "mem/protocol/AccessType.hh"
55#include "mem/protocol/GenericMachineType.hh"
56#include "mem/protocol/GenericRequestType.hh"
57#include "mem/protocol/PrefetchBit.hh"
58#include "mem/protocol/RubyAccessMode.hh"
59#include "mem/protocol/RubyRequestType.hh"
60#include "mem/ruby/common/Address.hh"
61#include "mem/ruby/common/Global.hh"
62#include "mem/ruby/common/Histogram.hh"
63#include "mem/ruby/common/Set.hh"
64#include "mem/ruby/system/MachineID.hh"
65#include "mem/ruby/system/MemoryControl.hh"
66#include "params/RubyProfiler.hh"
67#include "sim/sim_object.hh"
68
69class RubyRequest;
70class AddressProfiler;
71
72class Profiler : public SimObject
73{
74  public:
75    typedef RubyProfilerParams Params;
76    Profiler(const Params *);
77    ~Profiler();
78
79    void wakeup();
80
81    void setPeriodicStatsFile(const std::string& filename);
82    void setPeriodicStatsInterval(int64_t period);
83
84    void printStats(std::ostream& out, bool short_stats=false);
85    void printShortStats(std::ostream& out) { printStats(out, true); }
86    void printTraceStats(std::ostream& out) const;
87    void clearStats();
88    void printResourceUsage(std::ostream& out) const;
89
90    AddressProfiler* getAddressProfiler() { return m_address_profiler_ptr; }
91    AddressProfiler* getInstructionProfiler() { return m_inst_profiler_ptr; }
92
93    void addAddressTraceSample(const RubyRequest& msg, NodeID id);
94
95    void profileRequest(const std::string& requestStr);
96    void profileSharing(const Address& addr, AccessType type,
97                        NodeID requestor, const Set& sharers,
98                        const Set& owner);
99
100    void profileMulticastRetry(const Address& addr, int count);
101
102    void profileFilterAction(int action);
103
104    void profileConflictingRequests(const Address& addr);
105
106    void
107    profileOutstandingRequest(int outstanding)
108    {
109        m_outstanding_requests.add(outstanding);
110    }
111
112    void
113    profileOutstandingPersistentRequest(int outstanding)
114    {
115        m_outstanding_persistent_requests.add(outstanding);
116    }
117
118    void
119    profileAverageLatencyEstimate(int latency)
120    {
121        m_average_latency_estimate.add(latency);
122    }
123
124    void recordPrediction(bool wasGood, bool wasPredicted);
125
126    void startTransaction(int cpu);
127    void endTransaction(int cpu);
128    void profilePFWait(Cycles waitTime);
129
130    void controllerBusy(MachineID machID);
131    void bankBusy();
132
133    void missLatency(Cycles t, RubyRequestType type,
134                     const GenericMachineType respondingMach);
135
136    void missLatencyWcc(Cycles issuedTime, Cycles initialRequestTime,
137                        Cycles forwardRequestTime, Cycles firstResponseTime,
138                        Cycles completionTime);
139
140    void missLatencyDir(Cycles issuedTime, Cycles initialRequestTime,
141                        Cycles forwardRequestTime, Cycles firstResponseTime,
142                        Cycles completionTime);
143
144    void swPrefetchLatency(Cycles t, RubyRequestType type,
145                           const GenericMachineType respondingMach);
146
147    void sequencerRequests(int num) { m_sequencer_requests.add(num); }
148
149    void print(std::ostream& out) const;
150
151    void rubyWatch(int proc);
152    bool watchAddress(Address addr);
153
154    // return Ruby's start time
155    Cycles getRubyStartTime() { return m_ruby_start; }
156
157    // added by SS
158    bool getHotLines() { return m_hot_lines; }
159    bool getAllInstructions() { return m_all_instructions; }
160
161  private:
162    void printRequestProfile(std::ostream &out);
163    void printDelayProfile(std::ostream &out);
164
165  private:
166    // Private copy constructor and assignment operator
167    Profiler(const Profiler& obj);
168    Profiler& operator=(const Profiler& obj);
169
170    AddressProfiler* m_address_profiler_ptr;
171    AddressProfiler* m_inst_profiler_ptr;
172
173    std::vector<int64> m_instructions_executed_at_start;
174    std::vector<int64> m_cycles_executed_at_start;
175
176    std::ostream* m_periodic_output_file_ptr;
177    int64_t m_stats_period;
178
179    Cycles m_ruby_start;
180    time_t m_real_time_start_time;
181
182    int64_t m_busyBankCount;
183    Histogram m_multicast_retry_histogram;
184
185    Histogram m_filter_action_histogram;
186    Histogram m_tbeProfile;
187
188    Histogram m_sequencer_requests;
189    Histogram m_read_sharing_histogram;
190    Histogram m_write_sharing_histogram;
191    Histogram m_all_sharing_histogram;
192    int64 m_cache_to_cache;
193    int64 m_memory_to_cache;
194
195    Histogram m_prefetchWaitHistogram;
196
197    std::vector<Histogram> m_missLatencyHistograms;
198    std::vector<Histogram> m_machLatencyHistograms;
199    std::vector< std::vector<Histogram> > m_missMachLatencyHistograms;
200    Histogram m_wCCIssueToInitialRequestHistogram;
201    Histogram m_wCCInitialRequestToForwardRequestHistogram;
202    Histogram m_wCCForwardRequestToFirstResponseHistogram;
203    Histogram m_wCCFirstResponseToCompleteHistogram;
204    int64 m_wCCIncompleteTimes;
205    Histogram m_dirIssueToInitialRequestHistogram;
206    Histogram m_dirInitialRequestToForwardRequestHistogram;
207    Histogram m_dirForwardRequestToFirstResponseHistogram;
208    Histogram m_dirFirstResponseToCompleteHistogram;
209    int64 m_dirIncompleteTimes;
210
211    Histogram m_allMissLatencyHistogram;
212
213    Histogram m_allSWPrefetchLatencyHistogram;
214    Histogram m_SWPrefetchL2MissLatencyHistogram;
215    std::vector<Histogram> m_SWPrefetchLatencyHistograms;
216    std::vector<Histogram> m_SWPrefetchMachLatencyHistograms;
217
218    Histogram m_outstanding_requests;
219    Histogram m_outstanding_persistent_requests;
220
221    Histogram m_average_latency_estimate;
222
223    m5::hash_set<Address> m_watch_address_set;
224
225    //added by SS
226    bool m_hot_lines;
227    bool m_all_instructions;
228
229    int m_num_of_sequencers;
230
231  protected:
232    class ProfileEvent : public Event
233    {
234        public:
235            ProfileEvent(Profiler *_profiler)
236            {
237                profiler = _profiler;
238            }
239        private:
240            void process() { profiler->wakeup(); }
241            Profiler *profiler;
242    };
243    ProfileEvent m_event;
244};
245
246inline std::ostream&
247operator<<(std::ostream& out, const Profiler& obj)
248{
249    obj.print(out);
250    out << std::flush;
251    return out;
252}
253
254#endif // __MEM_RUBY_PROFILER_PROFILER_HH__
255