Profiler.cc revision 9747:fbe79534d024
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/*
30   This file has been modified by Kevin Moore and Dan Nussbaum of the
31   Scalable Systems Research Group at Sun Microsystems Laboratories
32   (http://research.sun.com/scalable/) to support the Adaptive
33   Transactional Memory Test Platform (ATMTP).
34
35   Please send email to atmtp-interest@sun.com with feedback, questions, or
36   to request future announcements about ATMTP.
37
38   ----------------------------------------------------------------------
39
40   File modification date: 2008-02-23
41
42   ----------------------------------------------------------------------
43*/
44
45// Allows use of times() library call, which determines virtual runtime
46#include <sys/resource.h>
47#include <sys/times.h>
48#include <sys/types.h>
49#include <unistd.h>
50
51#include <algorithm>
52#include <fstream>
53
54#include "base/stl_helpers.hh"
55#include "base/str.hh"
56#include "mem/protocol/MachineType.hh"
57#include "mem/protocol/RubyRequest.hh"
58#include "mem/ruby/network/Network.hh"
59#include "mem/ruby/profiler/AddressProfiler.hh"
60#include "mem/ruby/profiler/Profiler.hh"
61#include "mem/ruby/system/Sequencer.hh"
62#include "mem/ruby/system/System.hh"
63
64using namespace std;
65using m5::stl_helpers::operator<<;
66
67static double process_memory_total();
68static double process_memory_resident();
69
70Profiler::Profiler(const Params *p)
71    : SimObject(p)
72{
73    m_inst_profiler_ptr = NULL;
74    m_address_profiler_ptr = NULL;
75    m_real_time_start_time = time(NULL); // Not reset in clearStats()
76
77    m_hot_lines = p->hot_lines;
78    m_all_instructions = p->all_instructions;
79
80    m_num_of_sequencers = p->num_of_sequencers;
81
82    m_hot_lines = false;
83    m_all_instructions = false;
84
85    m_address_profiler_ptr = new AddressProfiler(m_num_of_sequencers);
86    m_address_profiler_ptr->setHotLines(m_hot_lines);
87    m_address_profiler_ptr->setAllInstructions(m_all_instructions);
88
89    if (m_all_instructions) {
90        m_inst_profiler_ptr = new AddressProfiler(m_num_of_sequencers);
91        m_inst_profiler_ptr->setHotLines(m_hot_lines);
92        m_inst_profiler_ptr->setAllInstructions(m_all_instructions);
93    }
94
95    p->ruby_system->registerProfiler(this);
96}
97
98Profiler::~Profiler()
99{
100}
101
102void
103Profiler::print(ostream& out) const
104{
105    out << "[Profiler]";
106}
107
108void
109Profiler::printRequestProfile(ostream &out) const
110{
111    out << "Request vs. RubySystem State Profile" << endl;
112    out << "--------------------------------" << endl;
113    out << endl;
114
115    map<string, uint64_t> m_requestProfileMap;
116    uint64_t m_requests = 0;
117
118    for (uint32_t i = 0; i < MachineType_NUM; i++) {
119        for (map<uint32_t, AbstractController*>::iterator it =
120                  g_abs_controls[i].begin();
121             it != g_abs_controls[i].end(); ++it) {
122
123            AbstractController *ctr = (*it).second;
124            map<string, uint64_t> mp = ctr->getRequestProfileMap();
125
126            for (map<string, uint64_t>::iterator jt = mp.begin();
127                 jt != mp.end(); ++jt) {
128
129                map<string, uint64_t>::iterator kt =
130                    m_requestProfileMap.find((*jt).first);
131                if (kt != m_requestProfileMap.end()) {
132                    (*kt).second += (*jt).second;
133                } else {
134                    m_requestProfileMap[(*jt).first] = (*jt).second;
135                }
136            }
137
138            m_requests += ctr->getRequestCount();
139        }
140    }
141
142    map<string, uint64_t>::const_iterator i = m_requestProfileMap.begin();
143    map<string, uint64_t>::const_iterator end = m_requestProfileMap.end();
144    for (; i != end; ++i) {
145        const string &key = i->first;
146        uint64_t count = i->second;
147
148        double percent = (100.0 * double(count)) / double(m_requests);
149        vector<string> items;
150        tokenize(items, key, ':');
151        vector<string>::iterator j = items.begin();
152        vector<string>::iterator end = items.end();
153        for (; j != end; ++i)
154            out << setw(10) << *j;
155        out << setw(11) << count;
156        out << setw(14) << percent << endl;
157    }
158    out << endl;
159}
160
161void
162Profiler::printDelayProfile(ostream &out) const
163{
164    out << "Message Delayed Cycles" << endl;
165    out << "----------------------" << endl;
166
167    uint32_t numVNets = Network::getNumberOfVirtualNetworks();
168    Histogram delayHistogram;
169    std::vector<Histogram> delayVCHistogram(numVNets);
170
171    for (uint32_t i = 0; i < MachineType_NUM; i++) {
172        for (map<uint32_t, AbstractController*>::iterator it =
173                  g_abs_controls[i].begin();
174             it != g_abs_controls[i].end(); ++it) {
175
176            AbstractController *ctr = (*it).second;
177            delayHistogram.add(ctr->getDelayHist());
178
179            for (uint32_t i = 0; i < numVNets; i++) {
180                delayVCHistogram[i].add(ctr->getDelayVCHist(i));
181            }
182        }
183    }
184
185    out << "Total_delay_cycles: " <<   delayHistogram << endl;
186
187    for (int i = 0; i < numVNets; i++) {
188        out << "  virtual_network_" << i << "_delay_cycles: "
189            << delayVCHistogram[i] << endl;
190    }
191}
192
193void
194Profiler::printOutstandingReqProfile(ostream &out) const
195{
196    Histogram sequencerRequests;
197
198    for (uint32_t i = 0; i < MachineType_NUM; i++) {
199        for (map<uint32_t, AbstractController*>::iterator it =
200                  g_abs_controls[i].begin();
201             it != g_abs_controls[i].end(); ++it) {
202
203            AbstractController *ctr = (*it).second;
204            Sequencer *seq = ctr->getSequencer();
205            if (seq != NULL) {
206                sequencerRequests.add(seq->getOutstandReqHist());
207            }
208        }
209    }
210
211    out << "sequencer_requests_outstanding: "
212        << sequencerRequests << endl;
213}
214
215void
216Profiler::printStats(ostream& out, bool short_stats)
217{
218    out << endl;
219    if (short_stats) {
220        out << "SHORT ";
221    }
222    out << "Profiler Stats" << endl;
223    out << "--------------" << endl;
224
225    time_t real_time_current = time(NULL);
226    double seconds = difftime(real_time_current, m_real_time_start_time);
227    double minutes = seconds / 60.0;
228    double hours = minutes / 60.0;
229    double days = hours / 24.0;
230    Cycles ruby_cycles = g_system_ptr->curCycle()-m_ruby_start;
231
232    if (!short_stats) {
233        out << "Elapsed_time_in_seconds: " << seconds << endl;
234        out << "Elapsed_time_in_minutes: " << minutes << endl;
235        out << "Elapsed_time_in_hours: " << hours << endl;
236        out << "Elapsed_time_in_days: " << days << endl;
237        out << endl;
238    }
239
240    // print the virtual runtimes as well
241    struct tms vtime;
242    times(&vtime);
243    seconds = (vtime.tms_utime + vtime.tms_stime) / 100.0;
244    minutes = seconds / 60.0;
245    hours = minutes / 60.0;
246    days = hours / 24.0;
247    out << "Virtual_time_in_seconds: " << seconds << endl;
248    out << "Virtual_time_in_minutes: " << minutes << endl;
249    out << "Virtual_time_in_hours:   " << hours << endl;
250    out << "Virtual_time_in_days:    " << days << endl;
251    out << endl;
252
253    out << "Ruby_current_time: " << g_system_ptr->curCycle() << endl;
254    out << "Ruby_start_time: " << m_ruby_start << endl;
255    out << "Ruby_cycles: " << ruby_cycles << endl;
256    out << endl;
257
258    if (!short_stats) {
259        out << "mbytes_resident: " << process_memory_resident() << endl;
260        out << "mbytes_total: " << process_memory_total() << endl;
261        if (process_memory_total() > 0) {
262            out << "resident_ratio: "
263                << process_memory_resident()/process_memory_total() << endl;
264        }
265        out << endl;
266    }
267
268    if (!short_stats) {
269        out << "Busy Controller Counts:" << endl;
270        for (uint32_t i = 0; i < MachineType_NUM; i++) {
271            uint32_t size = MachineType_base_count((MachineType)i);
272
273            for (uint32_t j = 0; j < size; j++) {
274                MachineID machID;
275                machID.type = (MachineType)i;
276                machID.num = j;
277
278                AbstractController *ctr =
279                    (*(g_abs_controls[i].find(j))).second;
280                out << machID << ":" << ctr->getFullyBusyCycles() << "  ";
281                if ((j + 1) % 8 == 0) {
282                    out << endl;
283                }
284            }
285            out << endl;
286        }
287        out << endl;
288
289        out << "Busy Bank Count:" << m_busyBankCount << endl;
290        out << endl;
291
292        printOutstandingReqProfile(out);
293        out << endl;
294    }
295
296    if (!short_stats) {
297        out << "All Non-Zero Cycle Demand Cache Accesses" << endl;
298        out << "----------------------------------------" << endl;
299        out << "miss_latency: " << m_allMissLatencyHistogram << endl;
300        for (int i = 0; i < m_missLatencyHistograms.size(); i++) {
301            if (m_missLatencyHistograms[i].size() > 0) {
302                out << "miss_latency_" << RubyRequestType(i) << ": "
303                    << m_missLatencyHistograms[i] << endl;
304            }
305        }
306        for (int i = 0; i < m_machLatencyHistograms.size(); i++) {
307            if (m_machLatencyHistograms[i].size() > 0) {
308                out << "miss_latency_" << GenericMachineType(i) << ": "
309                    << m_machLatencyHistograms[i] << endl;
310            }
311        }
312
313        out << "miss_latency_wCC_issue_to_initial_request: "
314            << m_wCCIssueToInitialRequestHistogram << endl;
315        out << "miss_latency_wCC_initial_forward_request: "
316            << m_wCCInitialRequestToForwardRequestHistogram << endl;
317        out << "miss_latency_wCC_forward_to_first_response: "
318            << m_wCCForwardRequestToFirstResponseHistogram << endl;
319        out << "miss_latency_wCC_first_response_to_completion: "
320            << m_wCCFirstResponseToCompleteHistogram << endl;
321        out << "imcomplete_wCC_Times: " << m_wCCIncompleteTimes << endl;
322        out << "miss_latency_dir_issue_to_initial_request: "
323            << m_dirIssueToInitialRequestHistogram << endl;
324        out << "miss_latency_dir_initial_forward_request: "
325            << m_dirInitialRequestToForwardRequestHistogram << endl;
326        out << "miss_latency_dir_forward_to_first_response: "
327            << m_dirForwardRequestToFirstResponseHistogram << endl;
328        out << "miss_latency_dir_first_response_to_completion: "
329            << m_dirFirstResponseToCompleteHistogram << endl;
330        out << "imcomplete_dir_Times: " << m_dirIncompleteTimes << endl;
331
332        for (int i = 0; i < m_missMachLatencyHistograms.size(); i++) {
333            for (int j = 0; j < m_missMachLatencyHistograms[i].size(); j++) {
334                if (m_missMachLatencyHistograms[i][j].size() > 0) {
335                    out << "miss_latency_" << RubyRequestType(i)
336                        << "_" << GenericMachineType(j) << ": "
337                        << m_missMachLatencyHistograms[i][j] << endl;
338                }
339            }
340        }
341
342        out << endl;
343
344        out << "All Non-Zero Cycle SW Prefetch Requests" << endl;
345        out << "------------------------------------" << endl;
346        out << "prefetch_latency: " << m_allSWPrefetchLatencyHistogram << endl;
347        for (int i = 0; i < m_SWPrefetchLatencyHistograms.size(); i++) {
348            if (m_SWPrefetchLatencyHistograms[i].size() > 0) {
349                out << "prefetch_latency_" << RubyRequestType(i) << ": "
350                    << m_SWPrefetchLatencyHistograms[i] << endl;
351            }
352        }
353        for (int i = 0; i < m_SWPrefetchMachLatencyHistograms.size(); i++) {
354            if (m_SWPrefetchMachLatencyHistograms[i].size() > 0) {
355                out << "prefetch_latency_" << GenericMachineType(i) << ": "
356                    << m_SWPrefetchMachLatencyHistograms[i] << endl;
357            }
358        }
359        out << "prefetch_latency_L2Miss:"
360            << m_SWPrefetchL2MissLatencyHistogram << endl;
361
362        if (m_all_sharing_histogram.size() > 0) {
363            out << "all_sharing: " << m_all_sharing_histogram << endl;
364            out << "read_sharing: " << m_read_sharing_histogram << endl;
365            out << "write_sharing: " << m_write_sharing_histogram << endl;
366
367            out << "all_sharing_percent: ";
368            m_all_sharing_histogram.printPercent(out);
369            out << endl;
370
371            out << "read_sharing_percent: ";
372            m_read_sharing_histogram.printPercent(out);
373            out << endl;
374
375            out << "write_sharing_percent: ";
376            m_write_sharing_histogram.printPercent(out);
377            out << endl;
378
379            int64 total_miss = m_cache_to_cache +  m_memory_to_cache;
380            out << "all_misses: " << total_miss << endl;
381            out << "cache_to_cache_misses: " << m_cache_to_cache << endl;
382            out << "memory_to_cache_misses: " << m_memory_to_cache << endl;
383            out << "cache_to_cache_percent: "
384                << 100.0 * (double(m_cache_to_cache) / double(total_miss))
385                << endl;
386            out << "memory_to_cache_percent: "
387                << 100.0 * (double(m_memory_to_cache) / double(total_miss))
388                << endl;
389            out << endl;
390        }
391
392        printRequestProfile(out);
393
394        if (!m_all_instructions) {
395            m_address_profiler_ptr->printStats(out);
396        }
397
398        if (m_all_instructions) {
399            m_inst_profiler_ptr->printStats(out);
400        }
401
402        out << endl;
403        printDelayProfile(out);
404        printResourceUsage(out);
405    }
406}
407
408void
409Profiler::printResourceUsage(ostream& out) const
410{
411    out << endl;
412    out << "Resource Usage" << endl;
413    out << "--------------" << endl;
414
415    int64_t pagesize = getpagesize(); // page size in bytes
416    out << "page_size: " << pagesize << endl;
417
418    rusage usage;
419    getrusage (RUSAGE_SELF, &usage);
420
421    out << "user_time: " << usage.ru_utime.tv_sec << endl;
422    out << "system_time: " << usage.ru_stime.tv_sec << endl;
423    out << "page_reclaims: " << usage.ru_minflt << endl;
424    out << "page_faults: " << usage.ru_majflt << endl;
425    out << "swaps: " << usage.ru_nswap << endl;
426    out << "block_inputs: " << usage.ru_inblock << endl;
427    out << "block_outputs: " << usage.ru_oublock << endl;
428}
429
430void
431Profiler::clearStats()
432{
433    m_ruby_start = g_system_ptr->curCycle();
434    m_real_time_start_time = time(NULL);
435
436    m_busyBankCount = 0;
437
438    m_missLatencyHistograms.resize(RubyRequestType_NUM);
439    for (int i = 0; i < m_missLatencyHistograms.size(); i++) {
440        m_missLatencyHistograms[i].clear(200);
441    }
442    m_machLatencyHistograms.resize(GenericMachineType_NUM+1);
443    for (int i = 0; i < m_machLatencyHistograms.size(); i++) {
444        m_machLatencyHistograms[i].clear(200);
445    }
446    m_missMachLatencyHistograms.resize(RubyRequestType_NUM);
447    for (int i = 0; i < m_missLatencyHistograms.size(); i++) {
448        m_missMachLatencyHistograms[i].resize(GenericMachineType_NUM+1);
449        for (int j = 0; j < m_missMachLatencyHistograms[i].size(); j++) {
450            m_missMachLatencyHistograms[i][j].clear(200);
451        }
452    }
453    m_allMissLatencyHistogram.clear(200);
454    m_wCCIssueToInitialRequestHistogram.clear(200);
455    m_wCCInitialRequestToForwardRequestHistogram.clear(200);
456    m_wCCForwardRequestToFirstResponseHistogram.clear(200);
457    m_wCCFirstResponseToCompleteHistogram.clear(200);
458    m_wCCIncompleteTimes = 0;
459    m_dirIssueToInitialRequestHistogram.clear(200);
460    m_dirInitialRequestToForwardRequestHistogram.clear(200);
461    m_dirForwardRequestToFirstResponseHistogram.clear(200);
462    m_dirFirstResponseToCompleteHistogram.clear(200);
463    m_dirIncompleteTimes = 0;
464
465    m_SWPrefetchLatencyHistograms.resize(RubyRequestType_NUM);
466    for (int i = 0; i < m_SWPrefetchLatencyHistograms.size(); i++) {
467        m_SWPrefetchLatencyHistograms[i].clear(200);
468    }
469    m_SWPrefetchMachLatencyHistograms.resize(GenericMachineType_NUM+1);
470    for (int i = 0; i < m_SWPrefetchMachLatencyHistograms.size(); i++) {
471        m_SWPrefetchMachLatencyHistograms[i].clear(200);
472    }
473    m_allSWPrefetchLatencyHistogram.clear(200);
474
475    m_read_sharing_histogram.clear();
476    m_write_sharing_histogram.clear();
477    m_all_sharing_histogram.clear();
478    m_cache_to_cache = 0;
479    m_memory_to_cache = 0;
480
481    // update the start time
482    m_ruby_start = g_system_ptr->curCycle();
483}
484
485void
486Profiler::addAddressTraceSample(const RubyRequest& msg, NodeID id)
487{
488    if (msg.getType() != RubyRequestType_IFETCH) {
489        // Note: The following line should be commented out if you
490        // want to use the special profiling that is part of the GS320
491        // protocol
492
493        // NOTE: Unless PROFILE_HOT_LINES is enabled, nothing will be
494        // profiled by the AddressProfiler
495        m_address_profiler_ptr->
496            addTraceSample(msg.getLineAddress(), msg.getProgramCounter(),
497                           msg.getType(), msg.getAccessMode(), id, false);
498    }
499}
500
501void
502Profiler::profileSharing(const Address& addr, AccessType type,
503                         NodeID requestor, const Set& sharers,
504                         const Set& owner)
505{
506    Set set_contacted(owner);
507    if (type == AccessType_Write) {
508        set_contacted.addSet(sharers);
509    }
510    set_contacted.remove(requestor);
511    int number_contacted = set_contacted.count();
512
513    if (type == AccessType_Write) {
514        m_write_sharing_histogram.add(number_contacted);
515    } else {
516        m_read_sharing_histogram.add(number_contacted);
517    }
518    m_all_sharing_histogram.add(number_contacted);
519
520    if (number_contacted == 0) {
521        m_memory_to_cache++;
522    } else {
523        m_cache_to_cache++;
524    }
525}
526
527void
528Profiler::bankBusy()
529{
530    m_busyBankCount++;
531}
532
533// non-zero cycle demand request
534void
535Profiler::missLatency(Cycles cycles,
536                      RubyRequestType type,
537                      const GenericMachineType respondingMach)
538{
539    m_allMissLatencyHistogram.add(cycles);
540    m_missLatencyHistograms[type].add(cycles);
541    m_machLatencyHistograms[respondingMach].add(cycles);
542    m_missMachLatencyHistograms[type][respondingMach].add(cycles);
543}
544
545void
546Profiler::missLatencyWcc(Cycles issuedTime,
547                         Cycles initialRequestTime,
548                         Cycles forwardRequestTime,
549                         Cycles firstResponseTime,
550                         Cycles completionTime)
551{
552    if ((issuedTime <= initialRequestTime) &&
553        (initialRequestTime <= forwardRequestTime) &&
554        (forwardRequestTime <= firstResponseTime) &&
555        (firstResponseTime <= completionTime)) {
556        m_wCCIssueToInitialRequestHistogram.add(initialRequestTime - issuedTime);
557
558        m_wCCInitialRequestToForwardRequestHistogram.add(forwardRequestTime -
559                                                         initialRequestTime);
560
561        m_wCCForwardRequestToFirstResponseHistogram.add(firstResponseTime -
562                                                        forwardRequestTime);
563
564        m_wCCFirstResponseToCompleteHistogram.add(completionTime -
565                                                  firstResponseTime);
566    } else {
567        m_wCCIncompleteTimes++;
568    }
569}
570
571void
572Profiler::missLatencyDir(Cycles issuedTime,
573                         Cycles initialRequestTime,
574                         Cycles forwardRequestTime,
575                         Cycles firstResponseTime,
576                         Cycles completionTime)
577{
578    if ((issuedTime <= initialRequestTime) &&
579        (initialRequestTime <= forwardRequestTime) &&
580        (forwardRequestTime <= firstResponseTime) &&
581        (firstResponseTime <= completionTime)) {
582        m_dirIssueToInitialRequestHistogram.add(initialRequestTime - issuedTime);
583
584        m_dirInitialRequestToForwardRequestHistogram.add(forwardRequestTime -
585                                                         initialRequestTime);
586
587        m_dirForwardRequestToFirstResponseHistogram.add(firstResponseTime -
588                                                        forwardRequestTime);
589
590        m_dirFirstResponseToCompleteHistogram.add(completionTime -
591                                                  firstResponseTime);
592    } else {
593        m_dirIncompleteTimes++;
594    }
595}
596
597// non-zero cycle prefetch request
598void
599Profiler::swPrefetchLatency(Cycles cycles, RubyRequestType type,
600                            const GenericMachineType respondingMach)
601{
602    m_allSWPrefetchLatencyHistogram.add(cycles);
603    m_SWPrefetchLatencyHistograms[type].add(cycles);
604    m_SWPrefetchMachLatencyHistograms[respondingMach].add(cycles);
605
606    if (respondingMach == GenericMachineType_Directory ||
607        respondingMach == GenericMachineType_NUM) {
608        m_SWPrefetchL2MissLatencyHistogram.add(cycles);
609    }
610}
611
612// Helper function
613static double
614process_memory_total()
615{
616    // 4kB page size, 1024*1024 bytes per MB,
617    const double MULTIPLIER = 4096.0 / (1024.0 * 1024.0);
618    ifstream proc_file;
619    proc_file.open("/proc/self/statm");
620    int total_size_in_pages = 0;
621    int res_size_in_pages = 0;
622    proc_file >> total_size_in_pages;
623    proc_file >> res_size_in_pages;
624    return double(total_size_in_pages) * MULTIPLIER; // size in megabytes
625}
626
627static double
628process_memory_resident()
629{
630    // 4kB page size, 1024*1024 bytes per MB,
631    const double MULTIPLIER = 4096.0 / (1024.0 * 1024.0);
632    ifstream proc_file;
633    proc_file.open("/proc/self/statm");
634    int total_size_in_pages = 0;
635    int res_size_in_pages = 0;
636    proc_file >> total_size_in_pages;
637    proc_file >> res_size_in_pages;
638    return double(res_size_in_pages) * MULTIPLIER; // size in megabytes
639}
640
641void
642Profiler::rubyWatch(int id)
643{
644    uint64 tr = 0;
645    Address watch_address = Address(tr);
646
647    DPRINTFN("%7s %3s RUBY WATCH %d\n", g_system_ptr->curCycle(), id,
648        watch_address);
649
650    // don't care about success or failure
651    m_watch_address_set.insert(watch_address);
652}
653
654bool
655Profiler::watchAddress(Address addr)
656{
657    return m_watch_address_set.count(addr) > 0;
658}
659
660Profiler *
661RubyProfilerParams::create()
662{
663    return new Profiler(this);
664}
665