Profiler.cc revision 6876:a658c315512c
1/* 2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29/* 30 This file has been modified by Kevin Moore and Dan Nussbaum of the 31 Scalable Systems Research Group at Sun Microsystems Laboratories 32 (http://research.sun.com/scalable/) to support the Adaptive 33 Transactional Memory Test Platform (ATMTP). 34 35 Please send email to atmtp-interest@sun.com with feedback, questions, or 36 to request future announcements about ATMTP. 37 38 ---------------------------------------------------------------------- 39 40 File modification date: 2008-02-23 41 42 ---------------------------------------------------------------------- 43*/ 44 45/* 46 * Profiler.cc 47 * 48 * Description: See Profiler.hh 49 * 50 * $Id$ 51 * 52 */ 53 54#include "mem/ruby/profiler/Profiler.hh" 55#include "mem/ruby/profiler/AddressProfiler.hh" 56#include "mem/ruby/system/System.hh" 57#include "mem/ruby/network/Network.hh" 58#include "mem/gems_common/PrioHeap.hh" 59#include "mem/protocol/CacheMsg.hh" 60#include "mem/protocol/Protocol.hh" 61#include "mem/gems_common/util.hh" 62#include "mem/gems_common/Map.hh" 63#include "mem/ruby/common/Debug.hh" 64#include "mem/protocol/MachineType.hh" 65 66#include "mem/ruby/system/System.hh" 67 68// Allows use of times() library call, which determines virtual runtime 69#include <sys/times.h> 70 71extern std::ostream * debug_cout_ptr; 72 73static double process_memory_total(); 74static double process_memory_resident(); 75 76Profiler::Profiler(const Params *p) 77 : SimObject(p) 78{ 79 m_requestProfileMap_ptr = new Map<string, int>; 80 81 m_inst_profiler_ptr = NULL; 82 m_address_profiler_ptr = NULL; 83 84 m_real_time_start_time = time(NULL); // Not reset in clearStats() 85 m_stats_period = 1000000; // Default 86 m_periodic_output_file_ptr = &cerr; 87 88 m_hot_lines = p->hot_lines; 89 m_all_instructions = p->all_instructions; 90 91 RubySystem::m_profiler_ptr = this; 92} 93 94Profiler::~Profiler() 95{ 96 if (m_periodic_output_file_ptr != &cerr) { 97 delete m_periodic_output_file_ptr; 98 } 99 delete m_requestProfileMap_ptr; 100} 101 102void Profiler::init(const vector<string> & argv, vector<string> memory_control_names) 103{ 104 // added by SS 105 vector<string>::iterator it; 106 memory_control_profiler* mcp; 107 m_memory_control_names = memory_control_names; 108// printf ( "Here in Profiler::init \n"); 109 for ( it=memory_control_names.begin() ; it < memory_control_names.end(); it++ ){ 110// printf ( "Here in Profiler::init memory control name %s \n", (*it).c_str()); 111 mcp = new memory_control_profiler; 112 mcp->m_memReq = 0; 113 mcp->m_memBankBusy = 0; 114 mcp->m_memBusBusy = 0; 115 mcp->m_memReadWriteBusy = 0; 116 mcp->m_memDataBusBusy = 0; 117 mcp->m_memTfawBusy = 0; 118 mcp->m_memRefresh = 0; 119 mcp->m_memRead = 0; 120 mcp->m_memWrite = 0; 121 mcp->m_memWaitCycles = 0; 122 mcp->m_memInputQ = 0; 123 mcp->m_memBankQ = 0; 124 mcp->m_memArbWait = 0; 125 mcp->m_memRandBusy = 0; 126 mcp->m_memNotOld = 0; 127 128 mcp->m_banks_per_rank = RubySystem::getMemoryControl((*it).c_str())->getBanksPerRank(); 129 mcp->m_ranks_per_dimm = RubySystem::getMemoryControl((*it).c_str())->getRanksPerDimm(); 130 mcp->m_dimms_per_channel = RubySystem::getMemoryControl((*it).c_str())->getDimmsPerChannel(); 131 132 int totalBanks = mcp->m_banks_per_rank 133 * mcp->m_ranks_per_dimm 134 * mcp->m_dimms_per_channel; 135 136 mcp->m_memBankCount.setSize(totalBanks); 137 138 m_memory_control_profilers [(*it).c_str()] = mcp; 139 } 140 141 clearStats(); 142 m_hot_lines = false; 143 m_all_instructions = false; 144 145 m_address_profiler_ptr = new AddressProfiler; 146 m_address_profiler_ptr -> setHotLines(m_hot_lines); 147 m_address_profiler_ptr -> setAllInstructions(m_all_instructions); 148 149 if (m_all_instructions) { 150 m_inst_profiler_ptr = new AddressProfiler; 151 m_inst_profiler_ptr -> setHotLines(m_hot_lines); 152 m_inst_profiler_ptr -> setAllInstructions(m_all_instructions); 153 } 154} 155 156void Profiler::wakeup() 157{ 158 // FIXME - avoid the repeated code 159 160 Vector<integer_t> perProcCycleCount; 161 perProcCycleCount.setSize(RubySystem::getNumberOfSequencers()); 162 163 for(int i=0; i < RubySystem::getNumberOfSequencers(); i++) { 164 perProcCycleCount[i] = g_system_ptr->getCycleCount(i) - m_cycles_executed_at_start[i] + 1; 165 // The +1 allows us to avoid division by zero 166 } 167 168 integer_t total_misses = m_perProcTotalMisses.sum(); 169 integer_t simics_cycles_executed = perProcCycleCount.sum(); 170 integer_t transactions_started = m_perProcStartTransaction.sum(); 171 integer_t transactions_ended = m_perProcEndTransaction.sum(); 172 173 (*m_periodic_output_file_ptr) << "ruby_cycles: " << g_eventQueue_ptr->getTime()-m_ruby_start << endl; 174 (*m_periodic_output_file_ptr) << "total_misses: " << total_misses << " " << m_perProcTotalMisses << endl; 175 (*m_periodic_output_file_ptr) << "simics_cycles_executed: " << simics_cycles_executed << " " << perProcCycleCount << endl; 176 (*m_periodic_output_file_ptr) << "transactions_started: " << transactions_started << " " << m_perProcStartTransaction << endl; 177 (*m_periodic_output_file_ptr) << "transactions_ended: " << transactions_ended << " " << m_perProcEndTransaction << endl; 178 (*m_periodic_output_file_ptr) << "mbytes_resident: " << process_memory_resident() << endl; 179 (*m_periodic_output_file_ptr) << "mbytes_total: " << process_memory_total() << endl; 180 if (process_memory_total() > 0) { 181 (*m_periodic_output_file_ptr) << "resident_ratio: " << process_memory_resident()/process_memory_total() << endl; 182 } 183 (*m_periodic_output_file_ptr) << "miss_latency: " << m_allMissLatencyHistogram << endl; 184 185 *m_periodic_output_file_ptr << endl; 186 187 if (m_all_instructions) { 188 m_inst_profiler_ptr->printStats(*m_periodic_output_file_ptr); 189 } 190 191 //g_system_ptr->getNetwork()->printStats(*m_periodic_output_file_ptr); 192 g_eventQueue_ptr->scheduleEvent(this, m_stats_period); 193} 194 195void Profiler::setPeriodicStatsFile(const string& filename) 196{ 197 cout << "Recording periodic statistics to file '" << filename << "' every " 198 << m_stats_period << " Ruby cycles" << endl; 199 200 if (m_periodic_output_file_ptr != &cerr) { 201 delete m_periodic_output_file_ptr; 202 } 203 204 m_periodic_output_file_ptr = new ofstream(filename.c_str()); 205 g_eventQueue_ptr->scheduleEvent(this, 1); 206} 207 208void Profiler::setPeriodicStatsInterval(integer_t period) 209{ 210 cout << "Recording periodic statistics every " << m_stats_period << " Ruby cycles" << endl; 211 m_stats_period = period; 212 g_eventQueue_ptr->scheduleEvent(this, 1); 213} 214 215void Profiler::printConfig(ostream& out) const 216{ 217 out << endl; 218 out << "Profiler Configuration" << endl; 219 out << "----------------------" << endl; 220 out << "periodic_stats_period: " << m_stats_period << endl; 221} 222 223void Profiler::print(ostream& out) const 224{ 225 out << "[Profiler]"; 226} 227 228void Profiler::printStats(ostream& out, bool short_stats) 229{ 230 out << endl; 231 if (short_stats) { 232 out << "SHORT "; 233 } 234 out << "Profiler Stats" << endl; 235 out << "--------------" << endl; 236 237 time_t real_time_current = time(NULL); 238 double seconds = difftime(real_time_current, m_real_time_start_time); 239 double minutes = seconds/60.0; 240 double hours = minutes/60.0; 241 double days = hours/24.0; 242 Time ruby_cycles = g_eventQueue_ptr->getTime()-m_ruby_start; 243 244 if (!short_stats) { 245 out << "Elapsed_time_in_seconds: " << seconds << endl; 246 out << "Elapsed_time_in_minutes: " << minutes << endl; 247 out << "Elapsed_time_in_hours: " << hours << endl; 248 out << "Elapsed_time_in_days: " << days << endl; 249 out << endl; 250 } 251 252 // print the virtual runtimes as well 253 struct tms vtime; 254 times(&vtime); 255 seconds = (vtime.tms_utime + vtime.tms_stime) / 100.0; 256 minutes = seconds / 60.0; 257 hours = minutes / 60.0; 258 days = hours / 24.0; 259 out << "Virtual_time_in_seconds: " << seconds << endl; 260 out << "Virtual_time_in_minutes: " << minutes << endl; 261 out << "Virtual_time_in_hours: " << hours << endl; 262 out << "Virtual_time_in_days: " << days << endl; 263 out << endl; 264 265 out << "Ruby_current_time: " << g_eventQueue_ptr->getTime() << endl; 266 out << "Ruby_start_time: " << m_ruby_start << endl; 267 out << "Ruby_cycles: " << ruby_cycles << endl; 268 out << endl; 269 270 if (!short_stats) { 271 out << "mbytes_resident: " << process_memory_resident() << endl; 272 out << "mbytes_total: " << process_memory_total() << endl; 273 if (process_memory_total() > 0) { 274 out << "resident_ratio: " << process_memory_resident()/process_memory_total() << endl; 275 } 276 out << endl; 277 278 } 279 280 Vector<integer_t> perProcCycleCount; 281 Vector<double> perProcCyclesPerTrans; 282 Vector<double> perProcMissesPerTrans; 283 284 285 perProcCycleCount.setSize(RubySystem::getNumberOfSequencers()); 286 perProcCyclesPerTrans.setSize(RubySystem::getNumberOfSequencers()); 287 perProcMissesPerTrans.setSize(RubySystem::getNumberOfSequencers()); 288 289 for(int i=0; i < RubySystem::getNumberOfSequencers(); i++) { 290 perProcCycleCount[i] = g_system_ptr->getCycleCount(i) - m_cycles_executed_at_start[i] + 1; 291 // The +1 allows us to avoid division by zero 292 293 int trans = m_perProcEndTransaction[i]; 294 if (trans == 0) { 295 perProcCyclesPerTrans[i] = 0; 296 perProcMissesPerTrans[i] = 0; 297 } else { 298 perProcCyclesPerTrans[i] = ruby_cycles / double(trans); 299 perProcMissesPerTrans[i] = m_perProcTotalMisses[i] / double(trans); 300 } 301 } 302 303 integer_t total_misses = m_perProcTotalMisses.sum(); 304 integer_t user_misses = m_perProcUserMisses.sum(); 305 integer_t supervisor_misses = m_perProcSupervisorMisses.sum(); 306 integer_t simics_cycles_executed = perProcCycleCount.sum(); 307 integer_t transactions_started = m_perProcStartTransaction.sum(); 308 integer_t transactions_ended = m_perProcEndTransaction.sum(); 309 310 double cycles_per_transaction = (transactions_ended != 0) ? (RubySystem::getNumberOfSequencers() * double(ruby_cycles)) / double(transactions_ended) : 0; 311 double misses_per_transaction = (transactions_ended != 0) ? double(total_misses) / double(transactions_ended) : 0; 312 313 out << "Total_misses: " << total_misses << endl; 314 out << "total_misses: " << total_misses << " " << m_perProcTotalMisses << endl; 315 out << "user_misses: " << user_misses << " " << m_perProcUserMisses << endl; 316 out << "supervisor_misses: " << supervisor_misses << " " << m_perProcSupervisorMisses << endl; 317 out << endl; 318 out << "ruby_cycles_executed: " << simics_cycles_executed << " " << perProcCycleCount << endl; 319 out << endl; 320 out << "transactions_started: " << transactions_started << " " << m_perProcStartTransaction << endl; 321 out << "transactions_ended: " << transactions_ended << " " << m_perProcEndTransaction << endl; 322 out << "cycles_per_transaction: " << cycles_per_transaction << " " << perProcCyclesPerTrans << endl; 323 out << "misses_per_transaction: " << misses_per_transaction << " " << perProcMissesPerTrans << endl; 324 325 out << endl; 326 327 out << endl; 328 329 vector<string>::iterator it; 330 331 for ( it=m_memory_control_names.begin() ; it < m_memory_control_names.end(); it++ ){ 332 long long int m_memReq = m_memory_control_profilers[(*it).c_str()] -> m_memReq; 333 long long int m_memRefresh = m_memory_control_profilers[(*it).c_str()] -> m_memRefresh; 334 long long int m_memInputQ = m_memory_control_profilers[(*it).c_str()] -> m_memInputQ; 335 long long int m_memBankQ = m_memory_control_profilers[(*it).c_str()] -> m_memBankQ; 336 long long int m_memWaitCycles = m_memory_control_profilers[(*it).c_str()] -> m_memWaitCycles; 337 long long int m_memRead = m_memory_control_profilers[(*it).c_str()] -> m_memRead; 338 long long int m_memWrite = m_memory_control_profilers[(*it).c_str()] -> m_memWrite; 339 long long int m_memBankBusy = m_memory_control_profilers[(*it).c_str()] -> m_memBankBusy; 340 long long int m_memRandBusy = m_memory_control_profilers[(*it).c_str()] -> m_memRandBusy; 341 long long int m_memNotOld = m_memory_control_profilers[(*it).c_str()] -> m_memNotOld; 342 long long int m_memArbWait = m_memory_control_profilers[(*it).c_str()] -> m_memArbWait; 343 long long int m_memBusBusy = m_memory_control_profilers[(*it).c_str()] -> m_memBusBusy; 344 long long int m_memTfawBusy = m_memory_control_profilers[(*it).c_str()] -> m_memTfawBusy; 345 long long int m_memReadWriteBusy = m_memory_control_profilers[(*it).c_str()] -> m_memReadWriteBusy; 346 long long int m_memDataBusBusy = m_memory_control_profilers[(*it).c_str()] -> m_memDataBusBusy; 347 Vector<long long int> m_memBankCount = m_memory_control_profilers[(*it).c_str()] -> m_memBankCount; 348 349 if (m_memReq || m_memRefresh) { // if there's a memory controller at all 350 long long int total_stalls = m_memInputQ + m_memBankQ + m_memWaitCycles; 351 double stallsPerReq = total_stalls * 1.0 / m_memReq; 352 out << "Memory control " << (*it) << ":" << endl; 353 out << " memory_total_requests: " << m_memReq << endl; // does not include refreshes 354 out << " memory_reads: " << m_memRead << endl; 355 out << " memory_writes: " << m_memWrite << endl; 356 out << " memory_refreshes: " << m_memRefresh << endl; 357 out << " memory_total_request_delays: " << total_stalls << endl; 358 out << " memory_delays_per_request: " << stallsPerReq << endl; 359 out << " memory_delays_in_input_queue: " << m_memInputQ << endl; 360 out << " memory_delays_behind_head_of_bank_queue: " << m_memBankQ << endl; 361 out << " memory_delays_stalled_at_head_of_bank_queue: " << m_memWaitCycles << endl; 362 // Note: The following "memory stalls" entries are a breakdown of the 363 // cycles which already showed up in m_memWaitCycles. The order is 364 // significant; it is the priority of attributing the cycles. 365 // For example, bank_busy is before arbitration because if the bank was 366 // busy, we didn't even check arbitration. 367 // Note: "not old enough" means that since we grouped waiting heads-of-queues 368 // into batches to avoid starvation, a request in a newer batch 369 // didn't try to arbitrate yet because there are older requests waiting. 370 out << " memory_stalls_for_bank_busy: " << m_memBankBusy << endl; 371 out << " memory_stalls_for_random_busy: " << m_memRandBusy << endl; 372 out << " memory_stalls_for_anti_starvation: " << m_memNotOld << endl; 373 out << " memory_stalls_for_arbitration: " << m_memArbWait << endl; 374 out << " memory_stalls_for_bus: " << m_memBusBusy << endl; 375 out << " memory_stalls_for_tfaw: " << m_memTfawBusy << endl; 376 out << " memory_stalls_for_read_write_turnaround: " << m_memReadWriteBusy << endl; 377 out << " memory_stalls_for_read_read_turnaround: " << m_memDataBusBusy << endl; 378 out << " accesses_per_bank: "; 379 for (int bank=0; bank < m_memBankCount.size(); bank++) { 380 out << m_memBankCount[bank] << " "; 381 //if ((bank % 8) == 7) out << " " << endl; 382 } 383 out << endl; 384 out << endl; 385 } 386 } 387 if (!short_stats) { 388 out << "Busy Controller Counts:" << endl; 389 for(int i=0; i < MachineType_NUM; i++) { 390 for(int j=0; j < MachineType_base_count((MachineType)i); j++) { 391 MachineID machID; 392 machID.type = (MachineType)i; 393 machID.num = j; 394 out << machID << ":" << m_busyControllerCount[i][j] << " "; 395 if ((j+1)%8 == 0) { 396 out << endl; 397 } 398 } 399 out << endl; 400 } 401 out << endl; 402 403 out << "Busy Bank Count:" << m_busyBankCount << endl; 404 out << endl; 405 406 out << "sequencer_requests_outstanding: " << m_sequencer_requests << endl; 407 out << endl; 408 } 409 410 if (!short_stats) { 411 out << "All Non-Zero Cycle Demand Cache Accesses" << endl; 412 out << "----------------------------------------" << endl; 413 out << "miss_latency: " << m_allMissLatencyHistogram << endl; 414 for(int i=0; i<m_missLatencyHistograms.size(); i++) { 415 if (m_missLatencyHistograms[i].size() > 0) { 416 out << "miss_latency_" << RubyRequestType(i) << ": " << m_missLatencyHistograms[i] << endl; 417 } 418 } 419 for(int i=0; i<m_machLatencyHistograms.size(); i++) { 420 if (m_machLatencyHistograms[i].size() > 0) { 421 out << "miss_latency_" << GenericMachineType(i) << ": " << m_machLatencyHistograms[i] << endl; 422 } 423 } 424 425 out << endl; 426 427 out << "All Non-Zero Cycle SW Prefetch Requests" << endl; 428 out << "------------------------------------" << endl; 429 out << "prefetch_latency: " << m_allSWPrefetchLatencyHistogram << endl; 430 for(int i=0; i<m_SWPrefetchLatencyHistograms.size(); i++) { 431 if (m_SWPrefetchLatencyHistograms[i].size() > 0) { 432 out << "prefetch_latency_" << CacheRequestType(i) << ": " << m_SWPrefetchLatencyHistograms[i] << endl; 433 } 434 } 435 for(int i=0; i<m_SWPrefetchMachLatencyHistograms.size(); i++) { 436 if (m_SWPrefetchMachLatencyHistograms[i].size() > 0) { 437 out << "prefetch_latency_" << GenericMachineType(i) << ": " << m_SWPrefetchMachLatencyHistograms[i] << endl; 438 } 439 } 440 out << "prefetch_latency_L2Miss:" << m_SWPrefetchL2MissLatencyHistogram << endl; 441 442 if (m_all_sharing_histogram.size() > 0) { 443 out << "all_sharing: " << m_all_sharing_histogram << endl; 444 out << "read_sharing: " << m_read_sharing_histogram << endl; 445 out << "write_sharing: " << m_write_sharing_histogram << endl; 446 447 out << "all_sharing_percent: "; m_all_sharing_histogram.printPercent(out); out << endl; 448 out << "read_sharing_percent: "; m_read_sharing_histogram.printPercent(out); out << endl; 449 out << "write_sharing_percent: "; m_write_sharing_histogram.printPercent(out); out << endl; 450 451 int64 total_miss = m_cache_to_cache + m_memory_to_cache; 452 out << "all_misses: " << total_miss << endl; 453 out << "cache_to_cache_misses: " << m_cache_to_cache << endl; 454 out << "memory_to_cache_misses: " << m_memory_to_cache << endl; 455 out << "cache_to_cache_percent: " << 100.0 * (double(m_cache_to_cache) / double(total_miss)) << endl; 456 out << "memory_to_cache_percent: " << 100.0 * (double(m_memory_to_cache) / double(total_miss)) << endl; 457 out << endl; 458 } 459 460 if (m_outstanding_requests.size() > 0) { 461 out << "outstanding_requests: "; m_outstanding_requests.printPercent(out); out << endl; 462 out << endl; 463 } 464 } 465 466 if (!short_stats) { 467 out << "Request vs. RubySystem State Profile" << endl; 468 out << "--------------------------------" << endl; 469 out << endl; 470 471 Vector<string> requestProfileKeys = m_requestProfileMap_ptr->keys(); 472 requestProfileKeys.sortVector(); 473 474 for(int i=0; i<requestProfileKeys.size(); i++) { 475 int temp_int = m_requestProfileMap_ptr->lookup(requestProfileKeys[i]); 476 double percent = (100.0*double(temp_int))/double(m_requests); 477 while (requestProfileKeys[i] != "") { 478 out << setw(10) << string_split(requestProfileKeys[i], ':'); 479 } 480 out << setw(11) << temp_int; 481 out << setw(14) << percent << endl; 482 } 483 out << endl; 484 485 out << "filter_action: " << m_filter_action_histogram << endl; 486 487 if (!m_all_instructions) { 488 m_address_profiler_ptr->printStats(out); 489 } 490 491 if (m_all_instructions) { 492 m_inst_profiler_ptr->printStats(out); 493 } 494 495 out << endl; 496 out << "Message Delayed Cycles" << endl; 497 out << "----------------------" << endl; 498 out << "Total_delay_cycles: " << m_delayedCyclesHistogram << endl; 499 out << "Total_nonPF_delay_cycles: " << m_delayedCyclesNonPFHistogram << endl; 500 for (int i = 0; i < m_delayedCyclesVCHistograms.size(); i++) { 501 out << " virtual_network_" << i << "_delay_cycles: " << m_delayedCyclesVCHistograms[i] << endl; 502 } 503 504 printResourceUsage(out); 505 } 506 507} 508 509void Profiler::printResourceUsage(ostream& out) const 510{ 511 out << endl; 512 out << "Resource Usage" << endl; 513 out << "--------------" << endl; 514 515 integer_t pagesize = getpagesize(); // page size in bytes 516 out << "page_size: " << pagesize << endl; 517 518 rusage usage; 519 getrusage (RUSAGE_SELF, &usage); 520 521 out << "user_time: " << usage.ru_utime.tv_sec << endl; 522 out << "system_time: " << usage.ru_stime.tv_sec << endl; 523 out << "page_reclaims: " << usage.ru_minflt << endl; 524 out << "page_faults: " << usage.ru_majflt << endl; 525 out << "swaps: " << usage.ru_nswap << endl; 526 out << "block_inputs: " << usage.ru_inblock << endl; 527 out << "block_outputs: " << usage.ru_oublock << endl; 528} 529 530void Profiler::clearStats() 531{ 532 m_ruby_start = g_eventQueue_ptr->getTime(); 533 534 m_cycles_executed_at_start.setSize(RubySystem::getNumberOfSequencers()); 535 for (int i=0; i < RubySystem::getNumberOfSequencers(); i++) { 536 if (g_system_ptr == NULL) { 537 m_cycles_executed_at_start[i] = 0; 538 } else { 539 m_cycles_executed_at_start[i] = g_system_ptr->getCycleCount(i); 540 } 541 } 542 543 m_perProcTotalMisses.setSize(RubySystem::getNumberOfSequencers()); 544 m_perProcUserMisses.setSize(RubySystem::getNumberOfSequencers()); 545 m_perProcSupervisorMisses.setSize(RubySystem::getNumberOfSequencers()); 546 m_perProcStartTransaction.setSize(RubySystem::getNumberOfSequencers()); 547 m_perProcEndTransaction.setSize(RubySystem::getNumberOfSequencers()); 548 549 for(int i=0; i < RubySystem::getNumberOfSequencers(); i++) { 550 m_perProcTotalMisses[i] = 0; 551 m_perProcUserMisses[i] = 0; 552 m_perProcSupervisorMisses[i] = 0; 553 m_perProcStartTransaction[i] = 0; 554 m_perProcEndTransaction[i] = 0; 555 } 556 557 m_busyControllerCount.setSize(MachineType_NUM); // all machines 558 for(int i=0; i < MachineType_NUM; i++) { 559 m_busyControllerCount[i].setSize(MachineType_base_count((MachineType)i)); 560 for(int j=0; j < MachineType_base_count((MachineType)i); j++) { 561 m_busyControllerCount[i][j] = 0; 562 } 563 } 564 m_busyBankCount = 0; 565 566 m_delayedCyclesHistogram.clear(); 567 m_delayedCyclesNonPFHistogram.clear(); 568 m_delayedCyclesVCHistograms.setSize(RubySystem::getNetwork()->getNumberOfVirtualNetworks()); 569 for (int i = 0; i < RubySystem::getNetwork()->getNumberOfVirtualNetworks(); i++) { 570 m_delayedCyclesVCHistograms[i].clear(); 571 } 572 573 m_missLatencyHistograms.setSize(RubyRequestType_NUM); 574 for(int i=0; i<m_missLatencyHistograms.size(); i++) { 575 m_missLatencyHistograms[i].clear(200); 576 } 577 m_machLatencyHistograms.setSize(GenericMachineType_NUM+1); 578 for(int i=0; i<m_machLatencyHistograms.size(); i++) { 579 m_machLatencyHistograms[i].clear(200); 580 } 581 m_allMissLatencyHistogram.clear(200); 582 583 m_SWPrefetchLatencyHistograms.setSize(CacheRequestType_NUM); 584 for(int i=0; i<m_SWPrefetchLatencyHistograms.size(); i++) { 585 m_SWPrefetchLatencyHistograms[i].clear(200); 586 } 587 m_SWPrefetchMachLatencyHistograms.setSize(GenericMachineType_NUM+1); 588 for(int i=0; i<m_SWPrefetchMachLatencyHistograms.size(); i++) { 589 m_SWPrefetchMachLatencyHistograms[i].clear(200); 590 } 591 m_allSWPrefetchLatencyHistogram.clear(200); 592 593 m_sequencer_requests.clear(); 594 m_read_sharing_histogram.clear(); 595 m_write_sharing_histogram.clear(); 596 m_all_sharing_histogram.clear(); 597 m_cache_to_cache = 0; 598 m_memory_to_cache = 0; 599 600 // clear HashMaps 601 m_requestProfileMap_ptr->clear(); 602 603 // count requests profiled 604 m_requests = 0; 605 606 m_outstanding_requests.clear(); 607 m_outstanding_persistent_requests.clear(); 608 609//added by SS 610 vector<string>::iterator it; 611 612 for ( it=m_memory_control_names.begin() ; it < m_memory_control_names.end(); it++ ){ 613 m_memory_control_profilers[(*it).c_str()] -> m_memReq = 0; 614 m_memory_control_profilers[(*it).c_str()] -> m_memBankBusy = 0; 615 m_memory_control_profilers[(*it).c_str()] -> m_memBusBusy = 0; 616 m_memory_control_profilers[(*it).c_str()] -> m_memTfawBusy = 0; 617 m_memory_control_profilers[(*it).c_str()] -> m_memReadWriteBusy = 0; 618 m_memory_control_profilers[(*it).c_str()] -> m_memDataBusBusy = 0; 619 m_memory_control_profilers[(*it).c_str()] -> m_memRefresh = 0; 620 m_memory_control_profilers[(*it).c_str()] -> m_memRead = 0; 621 m_memory_control_profilers[(*it).c_str()] -> m_memWrite = 0; 622 m_memory_control_profilers[(*it).c_str()] -> m_memWaitCycles = 0; 623 m_memory_control_profilers[(*it).c_str()] -> m_memInputQ = 0; 624 m_memory_control_profilers[(*it).c_str()] -> m_memBankQ = 0; 625 m_memory_control_profilers[(*it).c_str()] -> m_memArbWait = 0; 626 m_memory_control_profilers[(*it).c_str()] -> m_memRandBusy = 0; 627 m_memory_control_profilers[(*it).c_str()] -> m_memNotOld = 0; 628 629 for (int bank=0; bank < m_memory_control_profilers[(*it).c_str()] -> m_memBankCount.size(); bank++) { 630 m_memory_control_profilers[(*it).c_str()] -> m_memBankCount[bank] = 0; 631 } 632 } 633 // Flush the prefetches through the system - used so that there are no outstanding requests after stats are cleared 634 //g_eventQueue_ptr->triggerAllEvents(); 635 636 // update the start time 637 m_ruby_start = g_eventQueue_ptr->getTime(); 638} 639 640void Profiler::addAddressTraceSample(const CacheMsg& msg, NodeID id) 641{ 642 if (msg.getType() != CacheRequestType_IFETCH) { 643 644 // Note: The following line should be commented out if you want to 645 // use the special profiling that is part of the GS320 protocol 646 647 // NOTE: Unless PROFILE_HOT_LINES is enabled, nothing will be profiled by the AddressProfiler 648 m_address_profiler_ptr->addTraceSample(msg.getLineAddress(), msg.getProgramCounter(), msg.getType(), msg.getAccessMode(), id, false); 649 } 650} 651 652void Profiler::profileSharing(const Address& addr, AccessType type, NodeID requestor, const Set& sharers, const Set& owner) 653{ 654 Set set_contacted(owner); 655 if (type == AccessType_Write) { 656 set_contacted.addSet(sharers); 657 } 658 set_contacted.remove(requestor); 659 int number_contacted = set_contacted.count(); 660 661 if (type == AccessType_Write) { 662 m_write_sharing_histogram.add(number_contacted); 663 } else { 664 m_read_sharing_histogram.add(number_contacted); 665 } 666 m_all_sharing_histogram.add(number_contacted); 667 668 if (number_contacted == 0) { 669 m_memory_to_cache++; 670 } else { 671 m_cache_to_cache++; 672 } 673 674} 675 676void Profiler::profileMsgDelay(int virtualNetwork, int delayCycles) { 677 assert(virtualNetwork < m_delayedCyclesVCHistograms.size()); 678 m_delayedCyclesHistogram.add(delayCycles); 679 m_delayedCyclesVCHistograms[virtualNetwork].add(delayCycles); 680 if (virtualNetwork != 0) { 681 m_delayedCyclesNonPFHistogram.add(delayCycles); 682 } 683} 684 685// profiles original cache requests including PUTs 686void Profiler::profileRequest(const string& requestStr) 687{ 688 m_requests++; 689 690 if (m_requestProfileMap_ptr->exist(requestStr)) { 691 (m_requestProfileMap_ptr->lookup(requestStr))++; 692 } else { 693 m_requestProfileMap_ptr->add(requestStr, 1); 694 } 695} 696 697void Profiler::startTransaction(int cpu) 698{ 699 m_perProcStartTransaction[cpu]++; 700} 701 702void Profiler::endTransaction(int cpu) 703{ 704 m_perProcEndTransaction[cpu]++; 705} 706 707void Profiler::controllerBusy(MachineID machID) 708{ 709 m_busyControllerCount[(int)machID.type][(int)machID.num]++; 710} 711 712void Profiler::profilePFWait(Time waitTime) 713{ 714 m_prefetchWaitHistogram.add(waitTime); 715} 716 717void Profiler::bankBusy() 718{ 719 m_busyBankCount++; 720} 721 722// non-zero cycle demand request 723void Profiler::missLatency(Time t, RubyRequestType type) 724{ 725 m_allMissLatencyHistogram.add(t); 726 m_missLatencyHistograms[type].add(t); 727} 728 729// non-zero cycle prefetch request 730void Profiler::swPrefetchLatency(Time t, CacheRequestType type, GenericMachineType respondingMach) 731{ 732 m_allSWPrefetchLatencyHistogram.add(t); 733 m_SWPrefetchLatencyHistograms[type].add(t); 734 m_SWPrefetchMachLatencyHistograms[respondingMach].add(t); 735 if(respondingMach == GenericMachineType_Directory || respondingMach == GenericMachineType_NUM) { 736 m_SWPrefetchL2MissLatencyHistogram.add(t); 737 } 738} 739 740void Profiler::profileTransition(const string& component, NodeID version, Address addr, 741 const string& state, const string& event, 742 const string& next_state, const string& note) 743{ 744 const int EVENT_SPACES = 20; 745 const int ID_SPACES = 3; 746 const int TIME_SPACES = 7; 747 const int COMP_SPACES = 10; 748 const int STATE_SPACES = 6; 749 750 if ((g_debug_ptr->getDebugTime() > 0) && 751 (g_eventQueue_ptr->getTime() >= g_debug_ptr->getDebugTime())) { 752 (* debug_cout_ptr).flags(ios::right); 753 (* debug_cout_ptr) << setw(TIME_SPACES) << g_eventQueue_ptr->getTime() << " "; 754 (* debug_cout_ptr) << setw(ID_SPACES) << version << " "; 755 (* debug_cout_ptr) << setw(COMP_SPACES) << component; 756 (* debug_cout_ptr) << setw(EVENT_SPACES) << event << " "; 757 758 (* debug_cout_ptr).flags(ios::right); 759 (* debug_cout_ptr) << setw(STATE_SPACES) << state; 760 (* debug_cout_ptr) << ">"; 761 (* debug_cout_ptr).flags(ios::left); 762 (* debug_cout_ptr) << setw(STATE_SPACES) << next_state; 763 764 (* debug_cout_ptr) << " " << addr << " " << note; 765 766 (* debug_cout_ptr) << endl; 767 } 768} 769 770// Helper function 771static double process_memory_total() 772{ 773 const double MULTIPLIER = 4096.0/(1024.0*1024.0); // 4kB page size, 1024*1024 bytes per MB, 774 ifstream proc_file; 775 proc_file.open("/proc/self/statm"); 776 int total_size_in_pages = 0; 777 int res_size_in_pages = 0; 778 proc_file >> total_size_in_pages; 779 proc_file >> res_size_in_pages; 780 return double(total_size_in_pages)*MULTIPLIER; // size in megabytes 781} 782 783static double process_memory_resident() 784{ 785 const double MULTIPLIER = 4096.0/(1024.0*1024.0); // 4kB page size, 1024*1024 bytes per MB, 786 ifstream proc_file; 787 proc_file.open("/proc/self/statm"); 788 int total_size_in_pages = 0; 789 int res_size_in_pages = 0; 790 proc_file >> total_size_in_pages; 791 proc_file >> res_size_in_pages; 792 return double(res_size_in_pages)*MULTIPLIER; // size in megabytes 793} 794 795void Profiler::rubyWatch(int id){ 796 //int rn_g1 = 0;//SIMICS_get_register_number(id, "g1"); 797 uint64 tr = 0;//SIMICS_read_register(id, rn_g1); 798 Address watch_address = Address(tr); 799 const int ID_SPACES = 3; 800 const int TIME_SPACES = 7; 801 802 (* debug_cout_ptr).flags(ios::right); 803 (* debug_cout_ptr) << setw(TIME_SPACES) << g_eventQueue_ptr->getTime() << " "; 804 (* debug_cout_ptr) << setw(ID_SPACES) << id << " " 805 << "RUBY WATCH " 806 << watch_address 807 << endl; 808 809 if(!m_watch_address_list_ptr->exist(watch_address)){ 810 m_watch_address_list_ptr->add(watch_address, 1); 811 } 812} 813 814bool Profiler::watchAddress(Address addr){ 815 if (m_watch_address_list_ptr->exist(addr)) 816 return true; 817 else 818 return false; 819} 820 821int64 Profiler::getTotalTransactionsExecuted() const { 822 return m_perProcEndTransaction.sum(); 823} 824 825// For MemoryControl: 826void Profiler::profileMemReq(string name, int bank) { 827// printf("name is %s", name.c_str()); 828 assert(m_memory_control_profilers.count(name) == 1); 829 m_memory_control_profilers[name] -> m_memReq++; 830 m_memory_control_profilers[name] -> m_memBankCount[bank]++; 831} 832void Profiler::profileMemBankBusy(string name) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memBankBusy++; } 833void Profiler::profileMemBusBusy(string name) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memBusBusy++; } 834void Profiler::profileMemReadWriteBusy(string name) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memReadWriteBusy++; } 835void Profiler::profileMemDataBusBusy(string name) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memDataBusBusy++; } 836void Profiler::profileMemTfawBusy(string name) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memTfawBusy++; } 837void Profiler::profileMemRefresh(string name) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memRefresh++; } 838void Profiler::profileMemRead(string name) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memRead++; } 839void Profiler::profileMemWrite(string name) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memWrite++; } 840void Profiler::profileMemWaitCycles(string name, int cycles) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memWaitCycles += cycles; } 841void Profiler::profileMemInputQ(string name, int cycles) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memInputQ += cycles; } 842void Profiler::profileMemBankQ(string name, int cycles) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memBankQ += cycles; } 843void Profiler::profileMemArbWait(string name, int cycles) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memArbWait += cycles; } 844void Profiler::profileMemRandBusy(string name) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memRandBusy++; } 845void Profiler::profileMemNotOld(string name) { assert(m_memory_control_profilers.count(name) == 1); m_memory_control_profilers[name] -> m_memNotOld++; } 846 847 848Profiler * 849RubyProfilerParams::create() 850{ 851 return new Profiler(this); 852} 853