Switch.cc revision 11793:ef606668d247
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include "mem/ruby/network/simple/Switch.hh"
30
31#include <numeric>
32
33#include "base/cast.hh"
34#include "base/stl_helpers.hh"
35#include "mem/ruby/network/MessageBuffer.hh"
36#include "mem/ruby/network/simple/PerfectSwitch.hh"
37#include "mem/ruby/network/simple/SimpleNetwork.hh"
38#include "mem/ruby/network/simple/Throttle.hh"
39
40using namespace std;
41using m5::stl_helpers::deletePointers;
42using m5::stl_helpers::operator<<;
43
44Switch::Switch(const Params *p) : BasicRouter(p)
45{
46    m_perfect_switch = new PerfectSwitch(m_id, this, p->virt_nets);
47    m_port_buffers = p->port_buffers;
48    m_num_connected_buffers = 0;
49}
50
51Switch::~Switch()
52{
53    delete m_perfect_switch;
54
55    // Delete throttles (one per output port)
56    deletePointers(m_throttles);
57
58    // Delete MessageBuffers
59    deletePointers(m_port_buffers);
60}
61
62void
63Switch::init()
64{
65    BasicRouter::init();
66    m_perfect_switch->init(m_network_ptr);
67}
68
69void
70Switch::addInPort(const vector<MessageBuffer*>& in)
71{
72    m_perfect_switch->addInPort(in);
73}
74
75void
76Switch::addOutPort(const vector<MessageBuffer*>& out,
77                   const NetDest& routing_table_entry,
78                   Cycles link_latency, int bw_multiplier)
79{
80    // Create a throttle
81    RubySystem *rs = m_network_ptr->params()->ruby_system;
82    Throttle* throttle_ptr = new Throttle(m_id, rs, m_throttles.size(),
83                                          link_latency, bw_multiplier,
84                                          m_network_ptr->getEndpointBandwidth(),
85                                          this);
86
87    m_throttles.push_back(throttle_ptr);
88
89    // Create one buffer per vnet (these are intermediaryQueues)
90    vector<MessageBuffer*> intermediateBuffers;
91
92    for (int i = 0; i < out.size(); ++i) {
93        assert(m_num_connected_buffers < m_port_buffers.size());
94        MessageBuffer* buffer_ptr = m_port_buffers[m_num_connected_buffers];
95        m_num_connected_buffers++;
96        intermediateBuffers.push_back(buffer_ptr);
97    }
98
99    // Hook the queues to the PerfectSwitch
100    m_perfect_switch->addOutPort(intermediateBuffers, routing_table_entry);
101
102    // Hook the queues to the Throttle
103    throttle_ptr->addLinks(intermediateBuffers, out);
104}
105
106const Throttle*
107Switch::getThrottle(LinkID link_number) const
108{
109    assert(m_throttles[link_number] != NULL);
110    return m_throttles[link_number];
111}
112
113void
114Switch::regStats()
115{
116    BasicRouter::regStats();
117
118    for (int link = 0; link < m_throttles.size(); link++) {
119        m_throttles[link]->regStats(name());
120    }
121
122    m_avg_utilization.name(name() + ".percent_links_utilized");
123    for (unsigned int i = 0; i < m_throttles.size(); i++) {
124        m_avg_utilization += m_throttles[i]->getUtilization();
125    }
126    m_avg_utilization /= Stats::constant(m_throttles.size());
127
128    for (unsigned int type = MessageSizeType_FIRST;
129         type < MessageSizeType_NUM; ++type) {
130        m_msg_counts[type]
131            .name(name() + ".msg_count." +
132                MessageSizeType_to_string(MessageSizeType(type)))
133            .flags(Stats::nozero)
134            ;
135        m_msg_bytes[type]
136            .name(name() + ".msg_bytes." +
137                MessageSizeType_to_string(MessageSizeType(type)))
138            .flags(Stats::nozero)
139            ;
140
141        for (unsigned int i = 0; i < m_throttles.size(); i++) {
142            m_msg_counts[type] += m_throttles[i]->getMsgCount(type);
143        }
144        m_msg_bytes[type] = m_msg_counts[type] * Stats::constant(
145                Network::MessageSizeType_to_int(MessageSizeType(type)));
146    }
147}
148
149void
150Switch::resetStats()
151{
152    m_perfect_switch->clearStats();
153    for (int i = 0; i < m_throttles.size(); i++) {
154        m_throttles[i]->clearStats();
155    }
156}
157
158void
159Switch::collateStats()
160{
161    m_perfect_switch->collateStats();
162    for (int i = 0; i < m_throttles.size(); i++) {
163        m_throttles[i]->collateStats();
164    }
165}
166
167void
168Switch::print(std::ostream& out) const
169{
170    // FIXME printing
171    out << "[Switch]";
172}
173
174bool
175Switch::functionalRead(Packet *pkt)
176{
177    return false;
178}
179
180uint32_t
181Switch::functionalWrite(Packet *pkt)
182{
183    // Access the buffers in the switch for performing a functional write
184    uint32_t num_functional_writes = 0;
185    for (unsigned int i = 0; i < m_port_buffers.size(); ++i) {
186        num_functional_writes += m_port_buffers[i]->functionalWrite(pkt);
187    }
188    return num_functional_writes;
189}
190
191Switch *
192SwitchParams::create()
193{
194    return new Switch(this);
195}
196