Switch.cc revision 11523:81332eb10367 
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <numeric>
30
31#include "base/cast.hh"
32#include "base/stl_helpers.hh"
33#include "mem/ruby/network/MessageBuffer.hh"
34#include "mem/ruby/network/simple/PerfectSwitch.hh"
35#include "mem/ruby/network/simple/SimpleNetwork.hh"
36#include "mem/ruby/network/simple/Switch.hh"
37#include "mem/ruby/network/simple/Throttle.hh"
38
39using namespace std;
40using m5::stl_helpers::deletePointers;
41using m5::stl_helpers::operator<<;
42
43Switch::Switch(const Params *p) : BasicRouter(p)
44{
45    m_perfect_switch = new PerfectSwitch(m_id, this, p->virt_nets);
46    m_port_buffers = p->port_buffers;
47    m_num_connected_buffers = 0;
48}
49
50Switch::~Switch()
51{
52    delete m_perfect_switch;
53
54    // Delete throttles (one per output port)
55    deletePointers(m_throttles);
56
57    // Delete MessageBuffers
58    deletePointers(m_port_buffers);
59}
60
61void
62Switch::init()
63{
64    BasicRouter::init();
65    m_perfect_switch->init(m_network_ptr);
66}
67
68void
69Switch::addInPort(const vector<MessageBuffer*>& in)
70{
71    m_perfect_switch->addInPort(in);
72}
73
74void
75Switch::addOutPort(const vector<MessageBuffer*>& out,
76                   const NetDest& routing_table_entry,
77                   Cycles link_latency, int bw_multiplier)
78{
79    // Create a throttle
80    RubySystem *rs = m_network_ptr->params()->ruby_system;
81    Throttle* throttle_ptr = new Throttle(m_id, rs, m_throttles.size(),
82                                          link_latency, bw_multiplier,
83                                          m_network_ptr->getEndpointBandwidth(),
84                                          this);
85
86    m_throttles.push_back(throttle_ptr);
87
88    // Create one buffer per vnet (these are intermediaryQueues)
89    vector<MessageBuffer*> intermediateBuffers;
90
91    for (int i = 0; i < out.size(); ++i) {
92        assert(m_num_connected_buffers < m_port_buffers.size());
93        MessageBuffer* buffer_ptr = m_port_buffers[m_num_connected_buffers];
94        m_num_connected_buffers++;
95        intermediateBuffers.push_back(buffer_ptr);
96    }
97
98    // Hook the queues to the PerfectSwitch
99    m_perfect_switch->addOutPort(intermediateBuffers, routing_table_entry);
100
101    // Hook the queues to the Throttle
102    throttle_ptr->addLinks(intermediateBuffers, out);
103}
104
105const Throttle*
106Switch::getThrottle(LinkID link_number) const
107{
108    assert(m_throttles[link_number] != NULL);
109    return m_throttles[link_number];
110}
111
112void
113Switch::regStats()
114{
115    BasicRouter::regStats();
116
117    for (int link = 0; link < m_throttles.size(); link++) {
118        m_throttles[link]->regStats(name());
119    }
120
121    m_avg_utilization.name(name() + ".percent_links_utilized");
122    for (unsigned int i = 0; i < m_throttles.size(); i++) {
123        m_avg_utilization += m_throttles[i]->getUtilization();
124    }
125    m_avg_utilization /= Stats::constant(m_throttles.size());
126
127    for (unsigned int type = MessageSizeType_FIRST;
128         type < MessageSizeType_NUM; ++type) {
129        m_msg_counts[type]
130            .name(name() + ".msg_count." +
131                MessageSizeType_to_string(MessageSizeType(type)))
132            .flags(Stats::nozero)
133            ;
134        m_msg_bytes[type]
135            .name(name() + ".msg_bytes." +
136                MessageSizeType_to_string(MessageSizeType(type)))
137            .flags(Stats::nozero)
138            ;
139
140        for (unsigned int i = 0; i < m_throttles.size(); i++) {
141            m_msg_counts[type] += m_throttles[i]->getMsgCount(type);
142        }
143        m_msg_bytes[type] = m_msg_counts[type] * Stats::constant(
144                Network::MessageSizeType_to_int(MessageSizeType(type)));
145    }
146}
147
148void
149Switch::resetStats()
150{
151    m_perfect_switch->clearStats();
152    for (int i = 0; i < m_throttles.size(); i++) {
153        m_throttles[i]->clearStats();
154    }
155}
156
157void
158Switch::collateStats()
159{
160    m_perfect_switch->collateStats();
161    for (int i = 0; i < m_throttles.size(); i++) {
162        m_throttles[i]->collateStats();
163    }
164}
165
166void
167Switch::print(std::ostream& out) const
168{
169    // FIXME printing
170    out << "[Switch]";
171}
172
173bool
174Switch::functionalRead(Packet *pkt)
175{
176    return false;
177}
178
179uint32_t
180Switch::functionalWrite(Packet *pkt)
181{
182    // Access the buffers in the switch for performing a functional write
183    uint32_t num_functional_writes = 0;
184    for (unsigned int i = 0; i < m_port_buffers.size(); ++i) {
185        num_functional_writes += m_port_buffers[i]->functionalWrite(pkt);
186    }
187    return num_functional_writes;
188}
189
190Switch *
191SwitchParams::create()
192{
193    return new Switch(this);
194}
195