Switch.cc revision 11049:dfb0aa3f0649 
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <numeric>
30
31#include "base/cast.hh"
32#include "base/stl_helpers.hh"
33#include "mem/ruby/network/MessageBuffer.hh"
34#include "mem/ruby/network/simple/PerfectSwitch.hh"
35#include "mem/ruby/network/simple/SimpleNetwork.hh"
36#include "mem/ruby/network/simple/Switch.hh"
37#include "mem/ruby/network/simple/Throttle.hh"
38
39using namespace std;
40using m5::stl_helpers::deletePointers;
41using m5::stl_helpers::operator<<;
42
43Switch::Switch(const Params *p) : BasicRouter(p)
44{
45    m_perfect_switch = new PerfectSwitch(m_id, this, p->virt_nets);
46    m_port_buffers = p->port_buffers;
47    m_num_connected_buffers = 0;
48}
49
50Switch::~Switch()
51{
52    delete m_perfect_switch;
53
54    // Delete throttles (one per output port)
55    deletePointers(m_throttles);
56
57    // Delete MessageBuffers
58    deletePointers(m_port_buffers);
59}
60
61void
62Switch::init()
63{
64    BasicRouter::init();
65    m_perfect_switch->init(m_network_ptr);
66}
67
68void
69Switch::addInPort(const vector<MessageBuffer*>& in)
70{
71    m_perfect_switch->addInPort(in);
72
73    for (auto& it : in) {
74        if (it != nullptr) {
75            it->setReceiver(this);
76        }
77    }
78}
79
80void
81Switch::addOutPort(const vector<MessageBuffer*>& out,
82                   const NetDest& routing_table_entry,
83                   Cycles link_latency, int bw_multiplier)
84{
85    // Create a throttle
86    RubySystem *rs = m_network_ptr->params()->ruby_system;
87    Throttle* throttle_ptr = new Throttle(m_id, rs, m_throttles.size(),
88                                          link_latency, bw_multiplier,
89                                          m_network_ptr->getEndpointBandwidth(),
90                                          this);
91
92    m_throttles.push_back(throttle_ptr);
93
94    // Create one buffer per vnet (these are intermediaryQueues)
95    vector<MessageBuffer*> intermediateBuffers;
96
97    for (int i = 0; i < out.size(); ++i) {
98        if (out[i] != nullptr) {
99            out[i]->setSender(this);
100        }
101
102        assert(m_num_connected_buffers < m_port_buffers.size());
103        MessageBuffer* buffer_ptr = m_port_buffers[m_num_connected_buffers];
104        m_num_connected_buffers++;
105        intermediateBuffers.push_back(buffer_ptr);
106
107        buffer_ptr->setSender(this);
108        buffer_ptr->setReceiver(this);
109    }
110
111    // Hook the queues to the PerfectSwitch
112    m_perfect_switch->addOutPort(intermediateBuffers, routing_table_entry);
113
114    // Hook the queues to the Throttle
115    throttle_ptr->addLinks(intermediateBuffers, out);
116}
117
118const Throttle*
119Switch::getThrottle(LinkID link_number) const
120{
121    assert(m_throttles[link_number] != NULL);
122    return m_throttles[link_number];
123}
124
125void
126Switch::regStats()
127{
128    for (int link = 0; link < m_throttles.size(); link++) {
129        m_throttles[link]->regStats(name());
130    }
131
132    m_avg_utilization.name(name() + ".percent_links_utilized");
133    for (unsigned int i = 0; i < m_throttles.size(); i++) {
134        m_avg_utilization += m_throttles[i]->getUtilization();
135    }
136    m_avg_utilization /= Stats::constant(m_throttles.size());
137
138    for (unsigned int type = MessageSizeType_FIRST;
139         type < MessageSizeType_NUM; ++type) {
140        m_msg_counts[type]
141            .name(name() + ".msg_count." +
142                MessageSizeType_to_string(MessageSizeType(type)))
143            .flags(Stats::nozero)
144            ;
145        m_msg_bytes[type]
146            .name(name() + ".msg_bytes." +
147                MessageSizeType_to_string(MessageSizeType(type)))
148            .flags(Stats::nozero)
149            ;
150
151        for (unsigned int i = 0; i < m_throttles.size(); i++) {
152            m_msg_counts[type] += m_throttles[i]->getMsgCount(type);
153        }
154        m_msg_bytes[type] = m_msg_counts[type] * Stats::constant(
155                Network::MessageSizeType_to_int(MessageSizeType(type)));
156    }
157}
158
159void
160Switch::resetStats()
161{
162    m_perfect_switch->clearStats();
163    for (int i = 0; i < m_throttles.size(); i++) {
164        m_throttles[i]->clearStats();
165    }
166}
167
168void
169Switch::collateStats()
170{
171    m_perfect_switch->collateStats();
172    for (int i = 0; i < m_throttles.size(); i++) {
173        m_throttles[i]->collateStats();
174    }
175}
176
177void
178Switch::print(std::ostream& out) const
179{
180    // FIXME printing
181    out << "[Switch]";
182}
183
184bool
185Switch::functionalRead(Packet *pkt)
186{
187    // Access the buffers in the switch for performing a functional read
188    for (unsigned int i = 0; i < m_port_buffers.size(); ++i) {
189        if (m_port_buffers[i]->functionalRead(pkt)) {
190            return true;
191        }
192    }
193    return false;
194}
195
196uint32_t
197Switch::functionalWrite(Packet *pkt)
198{
199    // Access the buffers in the switch for performing a functional write
200    uint32_t num_functional_writes = 0;
201    for (unsigned int i = 0; i < m_port_buffers.size(); ++i) {
202        num_functional_writes += m_port_buffers[i]->functionalWrite(pkt);
203    }
204    return num_functional_writes;
205}
206
207Switch *
208SwitchParams::create()
209{
210    return new Switch(this);
211}
212