Switch.cc revision 10370:4466307b8a2a 
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <numeric>
30
31#include "base/cast.hh"
32#include "base/stl_helpers.hh"
33#include "mem/ruby/network/MessageBuffer.hh"
34#include "mem/ruby/network/simple/PerfectSwitch.hh"
35#include "mem/ruby/network/simple/SimpleNetwork.hh"
36#include "mem/ruby/network/simple/Switch.hh"
37#include "mem/ruby/network/simple/Throttle.hh"
38
39using namespace std;
40using m5::stl_helpers::deletePointers;
41using m5::stl_helpers::operator<<;
42
43Switch::Switch(const Params *p) : BasicRouter(p)
44{
45    m_perfect_switch = new PerfectSwitch(m_id, this, p->virt_nets);
46}
47
48Switch::~Switch()
49{
50    delete m_perfect_switch;
51
52    // Delete throttles (one per output port)
53    deletePointers(m_throttles);
54
55    // Delete MessageBuffers
56    deletePointers(m_buffers_to_free);
57}
58
59void
60Switch::init()
61{
62    BasicRouter::init();
63    m_perfect_switch->init(m_network_ptr);
64}
65
66void
67Switch::addInPort(const vector<MessageBuffer*>& in)
68{
69    m_perfect_switch->addInPort(in);
70
71    for (auto& it : in) {
72        if (it != nullptr) {
73            it->setReceiver(this);
74        }
75    }
76}
77
78void
79Switch::addOutPort(const vector<MessageBuffer*>& out,
80                   const NetDest& routing_table_entry,
81                   Cycles link_latency, int bw_multiplier)
82{
83    // Create a throttle
84    Throttle* throttle_ptr = new Throttle(m_id, m_throttles.size(),
85                                          link_latency, bw_multiplier,
86                                          m_network_ptr->getEndpointBandwidth(),
87                                          this);
88
89    m_throttles.push_back(throttle_ptr);
90
91    // Create one buffer per vnet (these are intermediaryQueues)
92    vector<MessageBuffer*> intermediateBuffers;
93
94    for (int i = 0; i < out.size(); ++i) {
95        if (out[i] != nullptr) {
96            out[i]->setSender(this);
97        }
98
99        MessageBuffer* buffer_ptr = new MessageBuffer;
100        // Make these queues ordered
101        buffer_ptr->setOrdering(true);
102        if (m_network_ptr->getBufferSize() > 0) {
103            buffer_ptr->resize(m_network_ptr->getBufferSize());
104        }
105
106        intermediateBuffers.push_back(buffer_ptr);
107        m_buffers_to_free.push_back(buffer_ptr);
108
109        buffer_ptr->setSender(this);
110        buffer_ptr->setReceiver(this);
111    }
112
113    // Hook the queues to the PerfectSwitch
114    m_perfect_switch->addOutPort(intermediateBuffers, routing_table_entry);
115
116    // Hook the queues to the Throttle
117    throttle_ptr->addLinks(intermediateBuffers, out);
118}
119
120const Throttle*
121Switch::getThrottle(LinkID link_number) const
122{
123    assert(m_throttles[link_number] != NULL);
124    return m_throttles[link_number];
125}
126
127void
128Switch::regStats()
129{
130    for (int link = 0; link < m_throttles.size(); link++) {
131        m_throttles[link]->regStats(name());
132    }
133
134    m_avg_utilization.name(name() + ".percent_links_utilized");
135    for (unsigned int i = 0; i < m_throttles.size(); i++) {
136        m_avg_utilization += m_throttles[i]->getUtilization();
137    }
138    m_avg_utilization /= Stats::constant(m_throttles.size());
139
140    for (unsigned int type = MessageSizeType_FIRST;
141         type < MessageSizeType_NUM; ++type) {
142        m_msg_counts[type]
143            .name(name() + ".msg_count." +
144                MessageSizeType_to_string(MessageSizeType(type)))
145            .flags(Stats::nozero)
146            ;
147        m_msg_bytes[type]
148            .name(name() + ".msg_bytes." +
149                MessageSizeType_to_string(MessageSizeType(type)))
150            .flags(Stats::nozero)
151            ;
152
153        for (unsigned int i = 0; i < m_throttles.size(); i++) {
154            m_msg_counts[type] += m_throttles[i]->getMsgCount(type);
155        }
156        m_msg_bytes[type] = m_msg_counts[type] * Stats::constant(
157                Network::MessageSizeType_to_int(MessageSizeType(type)));
158    }
159}
160
161void
162Switch::resetStats()
163{
164    m_perfect_switch->clearStats();
165    for (int i = 0; i < m_throttles.size(); i++) {
166        m_throttles[i]->clearStats();
167    }
168}
169
170void
171Switch::collateStats()
172{
173    m_perfect_switch->collateStats();
174    for (int i = 0; i < m_throttles.size(); i++) {
175        m_throttles[i]->collateStats();
176    }
177}
178
179void
180Switch::print(std::ostream& out) const
181{
182    // FIXME printing
183    out << "[Switch]";
184}
185
186bool
187Switch::functionalRead(Packet *pkt)
188{
189    // Access the buffers in the switch for performing a functional read
190    for (unsigned int i = 0; i < m_buffers_to_free.size(); ++i) {
191        if (m_buffers_to_free[i]->functionalRead(pkt)) {
192            return true;
193        }
194    }
195    return false;
196}
197
198uint32_t
199Switch::functionalWrite(Packet *pkt)
200{
201    // Access the buffers in the switch for performing a functional write
202    uint32_t num_functional_writes = 0;
203    for (unsigned int i = 0; i < m_buffers_to_free.size(); ++i) {
204        num_functional_writes += m_buffers_to_free[i]->functionalWrite(pkt);
205    }
206    return num_functional_writes;
207}
208
209Switch *
210SwitchParams::create()
211{
212    return new Switch(this);
213}
214