Topology.hh revision 7002
1 2/* 3 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer; 10 * redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution; 13 * neither the name of the copyright holders nor the names of its 14 * contributors may be used to endorse or promote products derived from 15 * this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30/* 31 * Topology.hh 32 * 33 * Description: The topology here is configurable; it can be a hierachical 34 * (default one) or a 2D torus or a 2D torus with half switches 35 * killed. I think all input port has a 36 * one-input-one-output switch connected just to control and 37 * bandwidth, since we don't control bandwidth on input ports. 38 * Basically, the class has a vector of nodes and edges. First 39 * 2*m_nodes elements in the node vector are input and output 40 * ports. Edges are represented in two vectors of src and dest 41 * nodes. All edges have latency. 42 * 43 * $Id$ 44 * 45 * */ 46 47#ifndef TOPOLOGY_H 48#define TOPOLOGY_H 49 50#include <iostream> 51#include <string> 52 53#include "mem/ruby/common/Global.hh" 54#include "mem/gems_common/Vector.hh" 55#include "mem/ruby/system/NodeID.hh" 56#include "sim/sim_object.hh" 57#include "params/Topology.hh" 58#include "params/Link.hh" 59#include "params/ExtLink.hh" 60#include "params/IntLink.hh" 61 62class Network; 63class NetDest; 64 65typedef Vector < Vector <int> > Matrix; 66 67class Link : public SimObject { 68 public: 69 typedef LinkParams Params; 70 Link(const Params *p) : SimObject(p) {} 71 const Params *params() const { return (const Params *)_params; } 72}; 73 74 75class ExtLink : public Link { 76 public: 77 typedef ExtLinkParams Params; 78 ExtLink(const Params *p) : Link(p) {} 79 const Params *params() const { return (const Params *)_params; } 80}; 81 82 83class IntLink : public Link { 84 public: 85 typedef IntLinkParams Params; 86 IntLink(const Params *p) : Link(p) {} 87 const Params *params() const { return (const Params *)_params; } 88}; 89 90 91class Topology : public SimObject { 92public: 93 // Constructors 94 typedef TopologyParams Params; 95 Topology(const Params *p); 96 const Params *params() const { return (const Params *)_params; } 97 98 // Destructor 99 virtual ~Topology() {} 100 101 // Public Methods 102 int numSwitches() const { return m_number_of_switches; } 103 void createLinks(Network *net, bool isReconfiguration); 104 105 void initNetworkPtr(Network* net_ptr); 106 107 const std::string getName() { return m_name; } 108 void printStats(std::ostream& out) const; 109 void clearStats(); 110 void printConfig(std::ostream& out) const; 111 void print(std::ostream& out) const { out << "[Topology]"; } 112 113protected: 114 // Private Methods 115 SwitchID newSwitchID(); 116 void addLink(SwitchID src, SwitchID dest, int link_latency); 117 void addLink(SwitchID src, SwitchID dest, int link_latency, int bw_multiplier); 118 void addLink(SwitchID src, SwitchID dest, int link_latency, int bw_multiplier, int link_weight); 119 void makeLink(Network *net, SwitchID src, SwitchID dest, const NetDest& routing_table_entry, int link_latency, int weight, int bw_multiplier, bool isReconfiguration); 120 121 // void makeSwitchesPerChip(Vector< Vector < SwitchID > > &nodePairs, Vector<int> &latencies, Vector<int> &bw_multis, int numberOfChips); 122 123 std::string getDesignStr(); 124 // Private copy constructor and assignment operator 125 Topology(const Topology& obj); 126 Topology& operator=(const Topology& obj); 127 128 // Data Members (m_ prefix) 129 std::string m_name; 130 bool m_print_config; 131 NodeID m_nodes; 132 int m_number_of_switches; 133 134 Vector<AbstractController*> m_controller_vector; 135 136 Vector<SwitchID> m_links_src_vector; 137 Vector<SwitchID> m_links_dest_vector; 138 Vector<int> m_links_latency_vector; 139 Vector<int> m_links_weight_vector; 140 Vector<int> m_bw_multiplier_vector; 141 142 Matrix m_component_latencies; 143 Matrix m_component_inter_switches; 144}; 145 146// Output operator declaration 147std::ostream& operator<<(std::ostream& out, const Topology& obj); 148 149// ******************* Definitions ******************* 150 151// Output operator definition 152extern inline 153std::ostream& operator<<(std::ostream& out, const Topology& obj) 154{ 155 obj.print(out); 156 out << std::flush; 157 return out; 158} 159 160#endif 161