Topology.cc revision 8485:7a9a7f2a3d46
1/* 2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29#include <cassert> 30 31#include "debug/RubyNetwork.hh" 32#include "mem/protocol/MachineType.hh" 33#include "mem/protocol/TopologyType.hh" 34#include "mem/ruby/common/NetDest.hh" 35#include "mem/ruby/network/BasicLink.hh" 36#include "mem/ruby/network/BasicRouter.hh" 37#include "mem/ruby/network/Network.hh" 38#include "mem/ruby/network/Topology.hh" 39#include "mem/ruby/slicc_interface/AbstractController.hh" 40#include "mem/ruby/system/System.hh" 41 42using namespace std; 43 44const int INFINITE_LATENCY = 10000; // Yes, this is a big hack 45 46class BasicRouter; 47 48// Note: In this file, we use the first 2*m_nodes SwitchIDs to 49// represent the input and output endpoint links. These really are 50// not 'switches', as they will not have a Switch object allocated for 51// them. The first m_nodes SwitchIDs are the links into the network, 52// the second m_nodes set of SwitchIDs represent the the output queues 53// of the network. 54 55// Helper functions based on chapter 29 of Cormen et al. 56void extend_shortest_path(Matrix& current_dist, Matrix& latencies, 57 Matrix& inter_switches); 58Matrix shortest_path(const Matrix& weights, Matrix& latencies, 59 Matrix& inter_switches); 60bool link_is_shortest_path_to_node(SwitchID src, SwitchID next, 61 SwitchID final, const Matrix& weights, const Matrix& dist); 62NetDest shortest_path_to_node(SwitchID src, SwitchID next, 63 const Matrix& weights, const Matrix& dist); 64 65Topology::Topology(const Params *p) 66 : SimObject(p) 67{ 68 m_print_config = p->print_config; 69 m_number_of_switches = p->routers.size(); 70 71 // initialize component latencies record 72 m_component_latencies.resize(0); 73 m_component_inter_switches.resize(0); 74 75 // Total nodes/controllers in network 76 // Must make sure this is called after the State Machine constructors 77 m_nodes = MachineType_base_number(MachineType_NUM); 78 assert(m_nodes > 1); 79 80 if (m_nodes != params()->ext_links.size() && 81 m_nodes != params()->ext_links.size()) { 82 fatal("m_nodes (%d) != ext_links vector length (%d)\n", 83 m_nodes != params()->ext_links.size()); 84 } 85 86 // analyze both the internal and external links, create data structures 87 // Note that the python created links are bi-directional, but that the 88 // topology and networks utilize uni-directional links. Thus each 89 // BasicLink is converted to two calls to add link, on for each direction 90 for (vector<BasicExtLink*>::const_iterator i = params()->ext_links.begin(); 91 i != params()->ext_links.end(); ++i) { 92 BasicExtLink *ext_link = (*i); 93 AbstractController *abs_cntrl = ext_link->params()->ext_node; 94 BasicRouter *router = ext_link->params()->int_node; 95 96 // Store the controller and ExtLink pointers for later 97 m_controller_vector.push_back(abs_cntrl); 98 m_ext_link_vector.push_back(ext_link); 99 100 int ext_idx1 = abs_cntrl->params()->cntrl_id; 101 int ext_idx2 = ext_idx1 + m_nodes; 102 int int_idx = router->params()->router_id + 2*m_nodes; 103 104 // create the internal uni-directional links in both directions 105 // the first direction is marked: In 106 addLink(ext_idx1, int_idx, ext_link, LinkDirection_In); 107 // the first direction is marked: Out 108 addLink(int_idx, ext_idx2, ext_link, LinkDirection_Out); 109 } 110 111 for (vector<BasicIntLink*>::const_iterator i = params()->int_links.begin(); 112 i != params()->int_links.end(); ++i) { 113 BasicIntLink *int_link = (*i); 114 BasicRouter *router_a = int_link->params()->node_a; 115 BasicRouter *router_b = int_link->params()->node_b; 116 117 // Store the IntLink pointers for later 118 m_int_link_vector.push_back(int_link); 119 120 int a = router_a->params()->router_id + 2*m_nodes; 121 int b = router_b->params()->router_id + 2*m_nodes; 122 123 // create the internal uni-directional links in both directions 124 // the first direction is marked: In 125 addLink(a, b, int_link, LinkDirection_In); 126 // the second direction is marked: Out 127 addLink(b, a, int_link, LinkDirection_Out); 128 } 129} 130 131void 132Topology::init() 133{ 134} 135 136 137void 138Topology::initNetworkPtr(Network* net_ptr) 139{ 140 for (vector<BasicExtLink*>::const_iterator i = params()->ext_links.begin(); 141 i != params()->ext_links.end(); ++i) { 142 BasicExtLink *ext_link = (*i); 143 AbstractController *abs_cntrl = ext_link->params()->ext_node; 144 abs_cntrl->initNetworkPtr(net_ptr); 145 } 146} 147 148void 149Topology::createLinks(Network *net, bool isReconfiguration) 150{ 151 // Find maximum switchID 152 SwitchID max_switch_id = 0; 153 for (LinkMap::const_iterator i = m_link_map.begin(); 154 i != m_link_map.end(); ++i) { 155 std::pair<int, int> src_dest = (*i).first; 156 max_switch_id = max(max_switch_id, src_dest.first); 157 max_switch_id = max(max_switch_id, src_dest.second); 158 } 159 160 // Initialize weight, latency, and inter switched vectors 161 Matrix topology_weights; 162 int num_switches = max_switch_id+1; 163 topology_weights.resize(num_switches); 164 m_component_latencies.resize(num_switches); 165 m_component_inter_switches.resize(num_switches); 166 167 for (int i = 0; i < topology_weights.size(); i++) { 168 topology_weights[i].resize(num_switches); 169 m_component_latencies[i].resize(num_switches); 170 m_component_inter_switches[i].resize(num_switches); 171 172 for (int j = 0; j < topology_weights[i].size(); j++) { 173 topology_weights[i][j] = INFINITE_LATENCY; 174 175 // initialize to invalid values 176 m_component_latencies[i][j] = -1; 177 178 // initially assume direct connections / no intermediate 179 // switches between components 180 m_component_inter_switches[i][j] = 0; 181 } 182 } 183 184 // Set identity weights to zero 185 for (int i = 0; i < topology_weights.size(); i++) { 186 topology_weights[i][i] = 0; 187 } 188 189 // Fill in the topology weights and bandwidth multipliers 190 for (LinkMap::const_iterator i = m_link_map.begin(); 191 i != m_link_map.end(); ++i) { 192 std::pair<int, int> src_dest = (*i).first; 193 BasicLink* link = (*i).second.link; 194 int src = src_dest.first; 195 int dst = src_dest.second; 196 m_component_latencies[src][dst] = link->m_latency; 197 topology_weights[src][dst] = link->m_weight; 198 } 199 200 // Walk topology and hookup the links 201 Matrix dist = shortest_path(topology_weights, m_component_latencies, 202 m_component_inter_switches); 203 for (int i = 0; i < topology_weights.size(); i++) { 204 for (int j = 0; j < topology_weights[i].size(); j++) { 205 int weight = topology_weights[i][j]; 206 if (weight > 0 && weight != INFINITE_LATENCY) { 207 NetDest destination_set = shortest_path_to_node(i, j, 208 topology_weights, dist); 209 makeLink(net, i, j, destination_set, isReconfiguration); 210 } 211 } 212 } 213} 214 215void 216Topology::addLink(SwitchID src, SwitchID dest, BasicLink* link, 217 LinkDirection dir) 218{ 219 assert(src <= m_number_of_switches+m_nodes+m_nodes); 220 assert(dest <= m_number_of_switches+m_nodes+m_nodes); 221 222 std::pair<int, int> src_dest_pair; 223 LinkEntry link_entry; 224 225 src_dest_pair.first = src; 226 src_dest_pair.second = dest; 227 link_entry.direction = dir; 228 link_entry.link = link; 229 m_link_map[src_dest_pair] = link_entry; 230} 231 232void 233Topology::makeLink(Network *net, SwitchID src, SwitchID dest, 234 const NetDest& routing_table_entry, bool isReconfiguration) 235{ 236 // Make sure we're not trying to connect two end-point nodes 237 // directly together 238 assert(src >= 2 * m_nodes || dest >= 2 * m_nodes); 239 240 std::pair<int, int> src_dest; 241 LinkEntry link_entry; 242 243 if (src < m_nodes) { 244 src_dest.first = src; 245 src_dest.second = dest; 246 link_entry = m_link_map[src_dest]; 247 net->makeInLink(src, dest - (2 * m_nodes), link_entry.link, 248 link_entry.direction, 249 routing_table_entry, 250 isReconfiguration); 251 } else if (dest < 2*m_nodes) { 252 assert(dest >= m_nodes); 253 NodeID node = dest - m_nodes; 254 src_dest.first = src; 255 src_dest.second = dest; 256 link_entry = m_link_map[src_dest]; 257 net->makeOutLink(src - (2 * m_nodes), node, link_entry.link, 258 link_entry.direction, 259 routing_table_entry, 260 isReconfiguration); 261 } else { 262 assert((src >= 2 * m_nodes) && (dest >= 2 * m_nodes)); 263 src_dest.first = src; 264 src_dest.second = dest; 265 link_entry = m_link_map[src_dest]; 266 net->makeInternalLink(src - (2 * m_nodes), dest - (2 * m_nodes), 267 link_entry.link, link_entry.direction, 268 routing_table_entry, isReconfiguration); 269 } 270} 271 272void 273Topology::printStats(std::ostream& out) const 274{ 275 for (int cntrl = 0; cntrl < m_controller_vector.size(); cntrl++) { 276 m_controller_vector[cntrl]->printStats(out); 277 } 278} 279 280void 281Topology::clearStats() 282{ 283 for (int cntrl = 0; cntrl < m_controller_vector.size(); cntrl++) { 284 m_controller_vector[cntrl]->clearStats(); 285 } 286} 287 288void 289Topology::printConfig(std::ostream& out) const 290{ 291 if (m_print_config == false) 292 return; 293 294 assert(m_component_latencies.size() > 0); 295 296 out << "--- Begin Topology Print ---" << endl 297 << endl 298 << "Topology print ONLY indicates the _NETWORK_ latency between two " 299 << "machines" << endl 300 << "It does NOT include the latency within the machines" << endl 301 << endl; 302 303 for (int m = 0; m < MachineType_NUM; m++) { 304 int i_end = MachineType_base_count((MachineType)m); 305 for (int i = 0; i < i_end; i++) { 306 MachineID cur_mach = {(MachineType)m, i}; 307 out << cur_mach << " Network Latencies" << endl; 308 for (int n = 0; n < MachineType_NUM; n++) { 309 int j_end = MachineType_base_count((MachineType)n); 310 for (int j = 0; j < j_end; j++) { 311 MachineID dest_mach = {(MachineType)n, j}; 312 if (cur_mach == dest_mach) 313 continue; 314 315 int src = MachineType_base_number((MachineType)m) + i; 316 int dst = MachineType_base_number(MachineType_NUM) + 317 MachineType_base_number((MachineType)n) + j; 318 int link_latency = m_component_latencies[src][dst]; 319 int intermediate_switches = 320 m_component_inter_switches[src][dst]; 321 322 // NOTE switches are assumed to have single 323 // cycle latency 324 out << " " << cur_mach << " -> " << dest_mach 325 << " net_lat: " 326 << link_latency + intermediate_switches << endl; 327 } 328 } 329 out << endl; 330 } 331 } 332 333 out << "--- End Topology Print ---" << endl; 334} 335 336// The following all-pairs shortest path algorithm is based on the 337// discussion from Cormen et al., Chapter 26.1. 338void 339extend_shortest_path(Matrix& current_dist, Matrix& latencies, 340 Matrix& inter_switches) 341{ 342 bool change = true; 343 int nodes = current_dist.size(); 344 345 while (change) { 346 change = false; 347 for (int i = 0; i < nodes; i++) { 348 for (int j = 0; j < nodes; j++) { 349 int minimum = current_dist[i][j]; 350 int previous_minimum = minimum; 351 int intermediate_switch = -1; 352 for (int k = 0; k < nodes; k++) { 353 minimum = min(minimum, 354 current_dist[i][k] + current_dist[k][j]); 355 if (previous_minimum != minimum) { 356 intermediate_switch = k; 357 inter_switches[i][j] = 358 inter_switches[i][k] + 359 inter_switches[k][j] + 1; 360 } 361 previous_minimum = minimum; 362 } 363 if (current_dist[i][j] != minimum) { 364 change = true; 365 current_dist[i][j] = minimum; 366 assert(intermediate_switch >= 0); 367 assert(intermediate_switch < latencies[i].size()); 368 latencies[i][j] = latencies[i][intermediate_switch] + 369 latencies[intermediate_switch][j]; 370 } 371 } 372 } 373 } 374} 375 376Matrix 377shortest_path(const Matrix& weights, Matrix& latencies, Matrix& inter_switches) 378{ 379 Matrix dist = weights; 380 extend_shortest_path(dist, latencies, inter_switches); 381 return dist; 382} 383 384bool 385link_is_shortest_path_to_node(SwitchID src, SwitchID next, SwitchID final, 386 const Matrix& weights, const Matrix& dist) 387{ 388 return weights[src][next] + dist[next][final] == dist[src][final]; 389} 390 391NetDest 392shortest_path_to_node(SwitchID src, SwitchID next, const Matrix& weights, 393 const Matrix& dist) 394{ 395 NetDest result; 396 int d = 0; 397 int machines; 398 int max_machines; 399 400 machines = MachineType_NUM; 401 max_machines = MachineType_base_number(MachineType_NUM); 402 403 for (int m = 0; m < machines; m++) { 404 for (int i = 0; i < MachineType_base_count((MachineType)m); i++) { 405 // we use "d+max_machines" below since the "destination" 406 // switches for the machines are numbered 407 // [MachineType_base_number(MachineType_NUM)... 408 // 2*MachineType_base_number(MachineType_NUM)-1] for the 409 // component network 410 if (link_is_shortest_path_to_node(src, next, d + max_machines, 411 weights, dist)) { 412 MachineID mach = {(MachineType)m, i}; 413 result.add(mach); 414 } 415 d++; 416 } 417 } 418 419 DPRINTF(RubyNetwork, "Returning shortest path\n" 420 "(src-(2*max_machines)): %d, (next-(2*max_machines)): %d, " 421 "src: %d, next: %d, result: %s\n", 422 (src-(2*max_machines)), (next-(2*max_machines)), 423 src, next, result); 424 425 return result; 426} 427 428Topology * 429TopologyParams::create() 430{ 431 return new Topology(this); 432} 433 434