request.hh revision 6106
1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Ron Dreslinski 29 * Steve Reinhardt 30 * Ali Saidi 31 */ 32 33/** 34 * @file 35 * Declaration of a request, the overall memory request consisting of 36 the parts of the request that are persistent throughout the transaction. 37 */ 38 39#ifndef __MEM_REQUEST_HH__ 40#define __MEM_REQUEST_HH__ 41 42#include <cassert> 43 44#include "base/fast_alloc.hh" 45#include "base/flags.hh" 46#include "base/misc.hh" 47#include "sim/host.hh" 48#include "sim/core.hh" 49 50class Request; 51 52typedef Request* RequestPtr; 53 54class Request : public FastAlloc 55{ 56 public: 57 typedef uint32_t FlagsType; 58 typedef ::Flags<FlagsType> Flags; 59 60 /** ASI information for this request if it exists. */ 61 static const FlagsType ASI_BITS = 0x000000FF; 62 /** The request is a Load locked/store conditional. */ 63 static const FlagsType LLSC = 0x00000100; 64 /** The virtual address is also the physical address. */ 65 static const FlagsType PHYSICAL = 0x00000200; 66 /** The request is an ALPHA VPTE pal access (hw_ld). */ 67 static const FlagsType VPTE = 0x00000400; 68 /** Use the alternate mode bits in ALPHA. */ 69 static const FlagsType ALTMODE = 0x00000800; 70 /** The request is to an uncacheable address. */ 71 static const FlagsType UNCACHEABLE = 0x00001000; 72 /** The request should not cause a page fault. */ 73 static const FlagsType NO_FAULT = 0x00002000; 74 /** The request should not cause a memory access. */ 75 static const FlagsType NO_ACCESS = 0x00004000; 76 /** This request will lock or unlock the accessed memory. When used with 77 * a load, the access locks the particular chunk of memory. When used 78 * with a store, it unlocks. The rule is that locked accesses have to be 79 * made up of a locked load, some operation on the data, and then a locked 80 * store. 81 */ 82 static const FlagsType LOCKED = 0x00008000; 83 /** The request should be prefetched into the exclusive state. */ 84 static const FlagsType PF_EXCLUSIVE = 0x00010000; 85 /** The request should be marked as LRU. */ 86 static const FlagsType EVICT_NEXT = 0x00020000; 87 /** The request should ignore unaligned access faults */ 88 static const FlagsType NO_ALIGN_FAULT = 0x00040000; 89 /** The request was an instruction fetch. */ 90 static const FlagsType INST_FETCH = 0x00080000; 91 /** This request is for a memory swap. */ 92 static const FlagsType MEM_SWAP = 0x00100000; 93 static const FlagsType MEM_SWAP_COND = 0x00200000; 94 /** The request should ignore unaligned access faults */ 95 static const FlagsType NO_HALF_WORD_ALIGN_FAULT = 0x00400000; 96 /** This request is to a memory mapped register. */ 97 static const FlagsType MMAPED_IPR = 0x00800000; 98 /** The request is a prefetch. */ 99 static const FlagsType PREFETCH = 0x01000000; 100 101 /** These flags are *not* cleared when a Request object is reused 102 (assigned a new address). */ 103 static const FlagsType STICKY_FLAGS = INST_FETCH; 104 105 private: 106 typedef uint8_t PrivateFlagsType; 107 typedef ::Flags<PrivateFlagsType> PrivateFlags; 108 109 /** Whether or not the size is valid. */ 110 static const PrivateFlagsType VALID_SIZE = 0x00000001; 111 /** Whether or not paddr is valid (has been written yet). */ 112 static const PrivateFlagsType VALID_PADDR = 0x00000002; 113 /** Whether or not the vaddr & asid are valid. */ 114 static const PrivateFlagsType VALID_VADDR = 0x00000004; 115 /** Whether or not the pc is valid. */ 116 static const PrivateFlagsType VALID_PC = 0x00000010; 117 /** Whether or not the context ID is valid. */ 118 static const PrivateFlagsType VALID_CONTEXT_ID = 0x00000020; 119 static const PrivateFlagsType VALID_THREAD_ID = 0x00000040; 120 /** Whether or not the sc result is valid. */ 121 static const PrivateFlagsType VALID_EXTRA_DATA = 0x00000080; 122 123 /** These flags are *not* cleared when a Request object is reused 124 (assigned a new address). */ 125 static const PrivateFlagsType STICKY_PRIVATE_FLAGS = 126 VALID_CONTEXT_ID | VALID_THREAD_ID; 127 128 private: 129 /** 130 * The physical address of the request. Valid only if validPaddr 131 * is set. 132 */ 133 Addr paddr; 134 135 /** 136 * The size of the request. This field must be set when vaddr or 137 * paddr is written via setVirt() or setPhys(), so it is always 138 * valid as long as one of the address fields is valid. 139 */ 140 int size; 141 142 /** Flag structure for the request. */ 143 Flags flags; 144 145 /** Private flags for field validity checking. */ 146 PrivateFlags privateFlags; 147 148 /** 149 * The time this request was started. Used to calculate 150 * latencies. This field is set to curTick any time paddr or vaddr 151 * is written. 152 */ 153 Tick time; 154 155 /** The address space ID. */ 156 int asid; 157 158 /** The virtual address of the request. */ 159 Addr vaddr; 160 161 /** 162 * Extra data for the request, such as the return value of 163 * store conditional or the compare value for a CAS. */ 164 uint64_t extraData; 165 166 /** The context ID (for statistics, typically). */ 167 int _contextId; 168 /** The thread ID (id within this CPU) */ 169 int _threadId; 170 171 /** program counter of initiating access; for tracing/debugging */ 172 Addr pc; 173 174 public: 175 /** Minimal constructor. No fields are initialized. */ 176 Request() 177 {} 178 179 /** 180 * Constructor for physical (e.g. device) requests. Initializes 181 * just physical address, size, flags, and timestamp (to curTick). 182 * These fields are adequate to perform a request. 183 */ 184 Request(Addr paddr, int size, Flags flags) 185 { 186 setPhys(paddr, size, flags); 187 } 188 189 Request(int asid, Addr vaddr, int size, Flags flags, Addr pc, 190 int cid, int tid) 191 { 192 setVirt(asid, vaddr, size, flags, pc); 193 setThreadContext(cid, tid); 194 } 195 196 ~Request() {} // for FastAlloc 197 198 /** 199 * Set up CPU and thread numbers. 200 */ 201 void 202 setThreadContext(int context_id, int thread_id) 203 { 204 _contextId = context_id; 205 _threadId = thread_id; 206 privateFlags.set(VALID_CONTEXT_ID|VALID_THREAD_ID); 207 } 208 209 /** 210 * Set up a physical (e.g. device) request in a previously 211 * allocated Request object. 212 */ 213 void 214 setPhys(Addr _paddr, int _size, Flags _flags) 215 { 216 assert(_size >= 0); 217 paddr = _paddr; 218 size = _size; 219 time = curTick; 220 221 flags.clear(~STICKY_FLAGS); 222 flags.set(_flags); 223 privateFlags.clear(~STICKY_PRIVATE_FLAGS); 224 privateFlags.set(VALID_PADDR|VALID_SIZE); 225 } 226 227 /** 228 * Set up a virtual (e.g., CPU) request in a previously 229 * allocated Request object. 230 */ 231 void 232 setVirt(int _asid, Addr _vaddr, int _size, Flags _flags, Addr _pc) 233 { 234 assert(_size >= 0); 235 asid = _asid; 236 vaddr = _vaddr; 237 size = _size; 238 flags = _flags; 239 pc = _pc; 240 time = curTick; 241 242 flags.clear(~STICKY_FLAGS); 243 flags.set(_flags); 244 privateFlags.clear(~STICKY_PRIVATE_FLAGS); 245 privateFlags.set(VALID_VADDR|VALID_SIZE|VALID_PC); 246 } 247 248 /** 249 * Set just the physical address. This should only be used to 250 * record the result of a translation, and thus the vaddr must be 251 * valid before this method is called. Otherwise, use setPhys() 252 * to guarantee that the size and flags are also set. 253 */ 254 void 255 setPaddr(Addr _paddr) 256 { 257 assert(privateFlags.isSet(VALID_VADDR)); 258 paddr = _paddr; 259 privateFlags.set(VALID_PADDR); 260 } 261 262 /** 263 * Generate two requests as if this request had been split into two 264 * pieces. The original request can't have been translated already. 265 */ 266 void splitOnVaddr(Addr split_addr, RequestPtr &req1, RequestPtr &req2) 267 { 268 assert(privateFlags.isSet(VALID_VADDR)); 269 assert(privateFlags.noneSet(VALID_PADDR)); 270 assert(split_addr > vaddr && split_addr < vaddr + size); 271 req1 = new Request; 272 *req1 = *this; 273 req2 = new Request; 274 *req2 = *this; 275 req1->size = split_addr - vaddr; 276 req2->vaddr = split_addr; 277 req2->size = size - req1->size; 278 } 279 280 /** 281 * Accessor for paddr. 282 */ 283 bool 284 hasPaddr() 285 { 286 return privateFlags.isSet(VALID_PADDR); 287 } 288 289 Addr 290 getPaddr() 291 { 292 assert(privateFlags.isSet(VALID_PADDR)); 293 return paddr; 294 } 295 296 /** 297 * Accessor for size. 298 */ 299 bool 300 hasSize() 301 { 302 return privateFlags.isSet(VALID_SIZE); 303 } 304 305 int 306 getSize() 307 { 308 assert(privateFlags.isSet(VALID_SIZE)); 309 return size; 310 } 311 312 /** Accessor for time. */ 313 Tick 314 getTime() 315 { 316 assert(privateFlags.isSet(VALID_PADDR|VALID_VADDR)); 317 return time; 318 } 319 320 /** Accessor for flags. */ 321 Flags 322 getFlags() 323 { 324 assert(privateFlags.isSet(VALID_PADDR|VALID_VADDR)); 325 return flags; 326 } 327 328 void 329 setFlags(Flags _flags) 330 { 331 assert(privateFlags.isSet(VALID_PADDR|VALID_VADDR)); 332 flags.set(_flags); 333 } 334 335 /** Accessor function for vaddr.*/ 336 Addr 337 getVaddr() 338 { 339 assert(privateFlags.isSet(VALID_VADDR)); 340 return vaddr; 341 } 342 343 /** Accessor function for asid.*/ 344 int 345 getAsid() 346 { 347 assert(privateFlags.isSet(VALID_VADDR)); 348 return asid; 349 } 350 351 /** Accessor function for asi.*/ 352 uint8_t 353 getAsi() 354 { 355 assert(privateFlags.isSet(VALID_VADDR)); 356 return flags & ASI_BITS; 357 } 358 359 /** Accessor function for MMAPED_IPR flag. */ 360 bool 361 isMmapedIpr() 362 { 363 assert(privateFlags.isSet(VALID_PADDR)); 364 return flags.isSet(MMAPED_IPR); 365 } 366 367 void 368 setMmapedIpr(bool r) 369 { 370 assert(VALID_VADDR); 371 flags.set(MMAPED_IPR); 372 } 373 374 /** Accessor function to check if sc result is valid. */ 375 bool 376 extraDataValid() 377 { 378 return privateFlags.isSet(VALID_EXTRA_DATA); 379 } 380 381 /** Accessor function for store conditional return value.*/ 382 uint64_t 383 getExtraData() const 384 { 385 assert(privateFlags.isSet(VALID_EXTRA_DATA)); 386 return extraData; 387 } 388 389 /** Accessor function for store conditional return value.*/ 390 void 391 setExtraData(uint64_t _extraData) 392 { 393 extraData = _extraData; 394 privateFlags.set(VALID_EXTRA_DATA); 395 } 396 397 bool 398 hasContextId() const 399 { 400 return privateFlags.isSet(VALID_CONTEXT_ID); 401 } 402 403 /** Accessor function for context ID.*/ 404 int 405 contextId() const 406 { 407 assert(privateFlags.isSet(VALID_CONTEXT_ID)); 408 return _contextId; 409 } 410 411 /** Accessor function for thread ID. */ 412 int 413 threadId() const 414 { 415 assert(privateFlags.isSet(VALID_THREAD_ID)); 416 return _threadId; 417 } 418 419 bool 420 hasPC() const 421 { 422 return privateFlags.isSet(VALID_PC); 423 } 424 425 /** Accessor function for pc.*/ 426 Addr 427 getPC() const 428 { 429 assert(privateFlags.isSet(VALID_PC)); 430 return pc; 431 } 432 433 /** Accessor Function to Check Cacheability. */ 434 bool isUncacheable() const { return flags.isSet(UNCACHEABLE); } 435 bool isInstFetch() const { return flags.isSet(INST_FETCH); } 436 bool isPrefetch() const { return flags.isSet(PREFETCH); } 437 bool isLLSC() const { return flags.isSet(LLSC); } 438 bool isLocked() const { return flags.isSet(LOCKED); } 439 bool isSwap() const { return flags.isSet(MEM_SWAP|MEM_SWAP_COND); } 440 bool isCondSwap() const { return flags.isSet(MEM_SWAP_COND); } 441 442 bool 443 isMisaligned() const 444 { 445 if (flags.isSet(NO_ALIGN_FAULT)) 446 return false; 447 448 if ((vaddr & 0x1)) 449 return true; 450 451 if (flags.isSet(NO_HALF_WORD_ALIGN_FAULT)) 452 return false; 453 454 if ((vaddr & 0x2)) 455 return true; 456 457 return false; 458 } 459}; 460 461#endif // __MEM_REQUEST_HH__ 462