request.hh revision 5731 
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ron Dreslinski
29 *          Steve Reinhardt
30 *          Ali Saidi
31 */
32
33/**
34 * @file
35 * Declaration of a request, the overall memory request consisting of
36 the parts of the request that are persistent throughout the transaction.
37 */
38
39#ifndef __MEM_REQUEST_HH__
40#define __MEM_REQUEST_HH__
41
42#include "base/fast_alloc.hh"
43#include "sim/host.hh"
44#include "sim/core.hh"
45
46#include <cassert>
47
48class Request;
49
50typedef Request* RequestPtr;
51
52
53/** ASI information for this request if it exsits. */
54const uint32_t ASI_BITS         = 0x000FF;
55/** The request is a Load locked/store conditional. */
56const uint32_t LOCKED           = 0x00100;
57/** The virtual address is also the physical address. */
58const uint32_t PHYSICAL         = 0x00200;
59/** The request is an ALPHA VPTE pal access (hw_ld). */
60const uint32_t VPTE             = 0x00400;
61/** Use the alternate mode bits in ALPHA. */
62const uint32_t ALTMODE          = 0x00800;
63/** The request is to an uncacheable address. */
64const uint32_t UNCACHEABLE      = 0x01000;
65/** The request should not cause a page fault. */
66const uint32_t NO_FAULT         = 0x02000;
67/** The request should be prefetched into the exclusive state. */
68const uint32_t PF_EXCLUSIVE     = 0x10000;
69/** The request should be marked as LRU. */
70const uint32_t EVICT_NEXT       = 0x20000;
71/** The request should ignore unaligned access faults */
72const uint32_t NO_ALIGN_FAULT   = 0x40000;
73/** The request was an instruction read. */
74const uint32_t INST_READ        = 0x80000;
75/** This request is for a memory swap. */
76const uint32_t MEM_SWAP         = 0x100000;
77const uint32_t MEM_SWAP_COND    = 0x200000;
78/** The request should ignore unaligned access faults */
79const uint32_t NO_HALF_WORD_ALIGN_FAULT = 0x400000;
80
81
82class Request : public FastAlloc
83{
84  private:
85    /**
86     * The physical address of the request. Valid only if validPaddr
87     * is set. */
88    Addr paddr;
89
90    /**
91     * The size of the request. This field must be set when vaddr or
92     * paddr is written via setVirt() or setPhys(), so it is always
93     * valid as long as one of the address fields is valid.  */
94    int size;
95
96    /** Flag structure for the request. */
97    uint32_t flags;
98
99    /**
100     * The time this request was started. Used to calculate
101     * latencies. This field is set to curTick any time paddr or vaddr
102     * is written.  */
103    Tick time;
104
105    /** The address space ID. */
106    int asid;
107
108    /** This request is to a memory mapped register. */
109    bool mmapedIpr;
110
111    /** The virtual address of the request. */
112    Addr vaddr;
113
114    /** Extra data for the request, such as the return value of
115     * store conditional or the compare value for a CAS. */
116    uint64_t extraData;
117
118    /** The context ID (for statistics, typically). */
119    int _contextId;
120    /** The thread ID (id within this CPU) */
121    int _threadId;
122
123    /** program counter of initiating access; for tracing/debugging */
124    Addr pc;
125
126    /** Whether or not paddr is valid (has been written yet). */
127    bool validPaddr;
128    /** Whether or not the asid & vaddr are valid. */
129    bool validAsidVaddr;
130    /** Whether or not the sc result is valid. */
131    bool validExData;
132    /** Whether or not the context ID is valid. */
133    bool validContextAndThreadIds;
134    /** Whether or not the pc is valid. */
135    bool validPC;
136
137  public:
138    /** Minimal constructor.  No fields are initialized. */
139    Request()
140        : validPaddr(false), validAsidVaddr(false),
141          validExData(false), validContextAndThreadIds(false), validPC(false)
142    {}
143
144    /**
145     * Constructor for physical (e.g. device) requests.  Initializes
146     * just physical address, size, flags, and timestamp (to curTick).
147     * These fields are adequate to perform a request.  */
148    Request(Addr _paddr, int _size, int _flags)
149        : validContextAndThreadIds(false)
150    { setPhys(_paddr, _size, _flags); }
151
152    Request(int _asid, Addr _vaddr, int _size, int _flags, Addr _pc,
153            int _context_id, int _thread_id)
154    {
155        setThreadContext(_context_id, _thread_id);
156        setVirt(_asid, _vaddr, _size, _flags, _pc);
157    }
158
159    ~Request() {}  // for FastAlloc
160
161    /**
162     * Set up CPU and thread numbers. */
163    void setThreadContext(int _context_id, int _thread_id)
164    {
165        _contextId = _context_id;
166        _threadId = _thread_id;
167        validContextAndThreadIds = true;
168    }
169
170    /**
171     * Set up a physical (e.g. device) request in a previously
172     * allocated Request object. */
173    void setPhys(Addr _paddr, int _size, int _flags)
174    {
175        assert(_size >= 0);
176        paddr = _paddr;
177        size = _size;
178        flags = _flags;
179        time = curTick;
180        validPaddr = true;
181        validAsidVaddr = false;
182        validPC = false;
183        validExData = false;
184        mmapedIpr = false;
185    }
186
187    /**
188     * Set up a virtual (e.g., CPU) request in a previously
189     * allocated Request object. */
190    void setVirt(int _asid, Addr _vaddr, int _size, int _flags, Addr _pc)
191    {
192        assert(_size >= 0);
193        asid = _asid;
194        vaddr = _vaddr;
195        size = _size;
196        flags = _flags;
197        pc = _pc;
198        time = curTick;
199        validPaddr = false;
200        validAsidVaddr = true;
201        validPC = true;
202        validExData = false;
203        mmapedIpr = false;
204    }
205
206    /** Set just the physical address.  This should only be used to
207     * record the result of a translation, and thus the vaddr must be
208     * valid before this method is called.  Otherwise, use setPhys()
209     * to guarantee that the size and flags are also set.
210     */
211    void setPaddr(Addr _paddr)
212    {
213        assert(validAsidVaddr);
214        paddr = _paddr;
215        validPaddr = true;
216    }
217
218    /** Accessor for paddr. */
219    Addr getPaddr() { assert(validPaddr); return paddr; }
220
221    /** Accessor for size. */
222    int getSize() { assert(validPaddr || validAsidVaddr); return size; }
223    /** Accessor for time. */
224    Tick getTime() { assert(validPaddr || validAsidVaddr); return time; }
225    void resetTime() { assert(validPaddr || validAsidVaddr); time = curTick; }
226    void
227    setTime(Tick when)
228    {
229        assert(validPaddr || validAsidVaddr);
230        time = when;
231    }
232
233    /** Accessor for flags. */
234    uint32_t getFlags() { assert(validPaddr || validAsidVaddr); return flags; }
235    /** Accessor for paddr. */
236    void setFlags(uint32_t _flags)
237    { assert(validPaddr || validAsidVaddr); flags = _flags; }
238
239    /** Accessor function for vaddr.*/
240    Addr getVaddr() { assert(validAsidVaddr); return vaddr; }
241
242    /** Accessor function for asid.*/
243    int getAsid() { assert(validAsidVaddr); return asid; }
244
245    /** Accessor function for asi.*/
246    uint8_t getAsi() { assert(validAsidVaddr); return flags & ASI_BITS; }
247
248    /** Accessor function for asi.*/
249    void setAsi(uint8_t a)
250    { assert(validAsidVaddr); flags = (flags & ~ASI_BITS) | a; }
251
252    /** Accessor function for asi.*/
253    bool isMmapedIpr() { assert(validPaddr); return mmapedIpr; }
254
255    /** Accessor function for asi.*/
256    void setMmapedIpr(bool r) { assert(validAsidVaddr); mmapedIpr = r; }
257
258    /** Accessor function to check if sc result is valid. */
259    bool extraDataValid() { return validExData; }
260    /** Accessor function for store conditional return value.*/
261    uint64_t getExtraData() { assert(validExData); return extraData; }
262    /** Accessor function for store conditional return value.*/
263    void setExtraData(uint64_t _extraData)
264    { extraData = _extraData; validExData = true; }
265
266    /** Accessor function for context ID.*/
267    int contextId() { assert(validContextAndThreadIds); return _contextId; }
268    /** Accessor function for thread ID. */
269    int threadId() { assert(validContextAndThreadIds); return _threadId; }
270
271    /** Accessor function for pc.*/
272    Addr getPC() { assert(validPC); return pc; }
273
274    /** Accessor Function to Check Cacheability. */
275    bool isUncacheable() { return (getFlags() & UNCACHEABLE) != 0; }
276
277    bool isInstRead() { return (getFlags() & INST_READ) != 0; }
278
279    bool isLocked() { return (getFlags() & LOCKED) != 0; }
280
281    bool isSwap() { return (getFlags() & MEM_SWAP ||
282                            getFlags() & MEM_SWAP_COND); }
283
284    bool isCondSwap() { return (getFlags() & MEM_SWAP_COND) != 0; }
285
286    bool inline isMisaligned() {return (!(getFlags() & NO_ALIGN_FAULT) &&
287                                        ((vaddr & 1)  ||
288                                         (!(getFlags() & NO_HALF_WORD_ALIGN_FAULT)
289                                          && (vaddr & 0x2))));}
290
291    friend class Packet;
292};
293
294#endif // __MEM_REQUEST_HH__
295