request.hh revision 2665
12381SN/A/*
22381SN/A * Copyright (c) 2002-2005 The Regents of The University of Michigan
32381SN/A * All rights reserved.
42381SN/A *
52381SN/A * Redistribution and use in source and binary forms, with or without
62381SN/A * modification, are permitted provided that the following conditions are
72381SN/A * met: redistributions of source code must retain the above copyright
82381SN/A * notice, this list of conditions and the following disclaimer;
92381SN/A * redistributions in binary form must reproduce the above copyright
102381SN/A * notice, this list of conditions and the following disclaimer in the
112381SN/A * documentation and/or other materials provided with the distribution;
122381SN/A * neither the name of the copyright holders nor the names of its
132381SN/A * contributors may be used to endorse or promote products derived from
142381SN/A * this software without specific prior written permission.
152381SN/A *
162381SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
172381SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
182381SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
192381SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
202381SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
212381SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
222381SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
232381SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
242381SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
252381SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
262381SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272665Ssaidi@eecs.umich.edu *
282665Ssaidi@eecs.umich.edu * Authors: Ron Dreslinski
292665Ssaidi@eecs.umich.edu *          Steve Reinhardt
302665Ssaidi@eecs.umich.edu *          Ali Saidi
312381SN/A */
322381SN/A
332381SN/A/**
342381SN/A * @file Decleration of a request, the overall memory request consisting of
352381SN/A the parts of the request that are persistent throughout the transaction.
362381SN/A */
372381SN/A
382381SN/A#ifndef __MEM_REQUEST_HH__
392381SN/A#define __MEM_REQUEST_HH__
402381SN/A
412423SN/A#include "arch/isa_traits.hh"
422394SN/A
432394SN/Aclass Request;
442394SN/A
452394SN/Atypedef Request* RequestPtr;
462394SN/A
472395SN/A/** The request is a Load locked/store conditional. */
482395SN/Aconst unsigned LOCKED		= 0x001;
492395SN/A/** The virtual address is also the physical address. */
502395SN/Aconst unsigned PHYSICAL		= 0x002;
512395SN/A/** The request is an ALPHA VPTE pal access (hw_ld). */
522395SN/Aconst unsigned VPTE		= 0x004;
532395SN/A/** Use the alternate mode bits in ALPHA. */
542395SN/Aconst unsigned ALTMODE		= 0x008;
552395SN/A/** The request is to an uncacheable address. */
562395SN/Aconst unsigned UNCACHEABLE	= 0x010;
572395SN/A/** The request should not cause a page fault. */
582395SN/Aconst unsigned NO_FAULT         = 0x020;
592397SN/A/** The request should be prefetched into the exclusive state. */
602397SN/Aconst unsigned PF_EXCLUSIVE	= 0x100;
612397SN/A/** The request should be marked as LRU. */
622397SN/Aconst unsigned EVICT_NEXT	= 0x200;
632495SN/A/** The request should ignore unaligned access faults */
642495SN/Aconst unsigned NO_ALIGN_FAULT   = 0x400;
652395SN/A
662381SN/Aclass Request
672381SN/A{
682663Sstever@eecs.umich.edu  private:
692663Sstever@eecs.umich.edu    /**
702663Sstever@eecs.umich.edu     * The physical address of the request. Valid only if validPaddr
712663Sstever@eecs.umich.edu     * is set. */
722663Sstever@eecs.umich.edu    Addr paddr;
732532SN/A
742663Sstever@eecs.umich.edu    /**
752663Sstever@eecs.umich.edu     * The size of the request. This field must be set when vaddr or
762663Sstever@eecs.umich.edu     * paddr is written via setVirt() or setPhys(), so it is always
772663Sstever@eecs.umich.edu     * valid as long as one of the address fields is valid.  */
782381SN/A    int size;
792395SN/A
802532SN/A    /** Flag structure for the request. */
812395SN/A    uint32_t flags;
822384SN/A
832663Sstever@eecs.umich.edu    /**
842663Sstever@eecs.umich.edu     * The time this request was started. Used to calculate
852663Sstever@eecs.umich.edu     * latencies. This field is set to curTick any time paddr or vaddr
862663Sstever@eecs.umich.edu     * is written.  */
872663Sstever@eecs.umich.edu    Tick time;
882384SN/A
892384SN/A    /** The address space ID. */
902384SN/A    int asid;
912663Sstever@eecs.umich.edu    /** The virtual address of the request. */
922663Sstever@eecs.umich.edu    Addr vaddr;
932384SN/A
942384SN/A    /** The return value of store conditional. */
952384SN/A    uint64_t scResult;
962384SN/A
972663Sstever@eecs.umich.edu    /** The cpu number (for statistics, typically). */
982384SN/A    int cpuNum;
992663Sstever@eecs.umich.edu    /** The requesting thread id (for statistics, typically). */
1002384SN/A    int  threadNum;
1012384SN/A
1022381SN/A    /** program counter of initiating access; for tracing/debugging */
1032381SN/A    Addr pc;
1042663Sstever@eecs.umich.edu
1052663Sstever@eecs.umich.edu    /** Whether or not paddr is valid (has been written yet). */
1062663Sstever@eecs.umich.edu    bool validPaddr;
1072663Sstever@eecs.umich.edu    /** Whether or not the asid & vaddr are valid. */
1082663Sstever@eecs.umich.edu    bool validAsidVaddr;
1092663Sstever@eecs.umich.edu    /** Whether or not the sc result is valid. */
1102663Sstever@eecs.umich.edu    bool validScResult;
1112663Sstever@eecs.umich.edu    /** Whether or not the cpu number & thread ID are valid. */
1122663Sstever@eecs.umich.edu    bool validCpuAndThreadNums;
1132663Sstever@eecs.umich.edu    /** Whether or not the pc is valid. */
1142532SN/A    bool validPC;
1152532SN/A
1162532SN/A  public:
1172663Sstever@eecs.umich.edu    /** Minimal constructor.  No fields are initialized. */
1182663Sstever@eecs.umich.edu    Request()
1192663Sstever@eecs.umich.edu        : validPaddr(false), validAsidVaddr(false),
1202663Sstever@eecs.umich.edu          validScResult(false), validCpuAndThreadNums(false), validPC(false)
1212663Sstever@eecs.umich.edu    {}
1222532SN/A
1232663Sstever@eecs.umich.edu    /**
1242663Sstever@eecs.umich.edu     * Constructor for physical (e.g. device) requests.  Initializes
1252663Sstever@eecs.umich.edu     * just physical address, size, flags, and timestamp (to curTick).
1262663Sstever@eecs.umich.edu     * These fields are adequate to perform a request.  */
1272663Sstever@eecs.umich.edu    Request(Addr _paddr, int _size, int _flags)
1282663Sstever@eecs.umich.edu        : validCpuAndThreadNums(false)
1292663Sstever@eecs.umich.edu    { setPhys(_paddr, _size, _flags); }
1302532SN/A
1312663Sstever@eecs.umich.edu    /**
1322663Sstever@eecs.umich.edu     * Set up CPU and thread numbers. */
1332663Sstever@eecs.umich.edu    void setThreadContext(int _cpuNum, int _threadNum)
1342663Sstever@eecs.umich.edu    {
1352663Sstever@eecs.umich.edu        cpuNum = _cpuNum;
1362663Sstever@eecs.umich.edu        threadNum = _threadNum;
1372663Sstever@eecs.umich.edu        validCpuAndThreadNums = true;
1382663Sstever@eecs.umich.edu    }
1392532SN/A
1402663Sstever@eecs.umich.edu    /**
1412663Sstever@eecs.umich.edu     * Set up a physical (e.g. device) request in a previously
1422663Sstever@eecs.umich.edu     * allocated Request object. */
1432663Sstever@eecs.umich.edu    void setPhys(Addr _paddr, int _size, int _flags)
1442663Sstever@eecs.umich.edu    {
1452663Sstever@eecs.umich.edu        paddr = _paddr;
1462663Sstever@eecs.umich.edu        size = _size;
1472663Sstever@eecs.umich.edu        flags = _flags;
1482663Sstever@eecs.umich.edu        time = curTick;
1492663Sstever@eecs.umich.edu        validPaddr = true;
1502663Sstever@eecs.umich.edu        validAsidVaddr = false;
1512663Sstever@eecs.umich.edu        validPC = false;
1522663Sstever@eecs.umich.edu        validScResult = false;
1532663Sstever@eecs.umich.edu    }
1542532SN/A
1552663Sstever@eecs.umich.edu    /**
1562663Sstever@eecs.umich.edu     * Set up a virtual (e.g., CPU) request in a previously
1572663Sstever@eecs.umich.edu     * allocated Request object. */
1582663Sstever@eecs.umich.edu    void setVirt(int _asid, Addr _vaddr, int _size, int _flags, Addr _pc)
1592663Sstever@eecs.umich.edu    {
1602663Sstever@eecs.umich.edu        asid = _asid;
1612663Sstever@eecs.umich.edu        vaddr = _vaddr;
1622663Sstever@eecs.umich.edu        size = _size;
1632663Sstever@eecs.umich.edu        flags = _flags;
1642663Sstever@eecs.umich.edu        pc = _pc;
1652663Sstever@eecs.umich.edu        time = curTick;
1662663Sstever@eecs.umich.edu        validPaddr = false;
1672663Sstever@eecs.umich.edu        validAsidVaddr = true;
1682663Sstever@eecs.umich.edu        validPC = true;
1692663Sstever@eecs.umich.edu        validScResult = false;
1702663Sstever@eecs.umich.edu    }
1712532SN/A
1722663Sstever@eecs.umich.edu    /** Set just the physical address.  This should only be used to
1732663Sstever@eecs.umich.edu     * record the result of a translation, and thus the vaddr must be
1742663Sstever@eecs.umich.edu     * valid before this method is called.  Otherwise, use setPhys()
1752663Sstever@eecs.umich.edu     * to guarantee that the size and flags are also set.
1762663Sstever@eecs.umich.edu     */
1772663Sstever@eecs.umich.edu    void setPaddr(Addr _paddr)
1782663Sstever@eecs.umich.edu    {
1792663Sstever@eecs.umich.edu        assert(validAsidVaddr);
1802663Sstever@eecs.umich.edu        paddr = _paddr;
1812663Sstever@eecs.umich.edu        validPaddr = true;
1822663Sstever@eecs.umich.edu    }
1832532SN/A
1842663Sstever@eecs.umich.edu    /** Accessor for paddr. */
1852663Sstever@eecs.umich.edu    Addr getPaddr() { assert(validPaddr); return paddr; }
1862663Sstever@eecs.umich.edu
1872663Sstever@eecs.umich.edu    /** Accessor for size. */
1882663Sstever@eecs.umich.edu    int getSize() { assert(validPaddr || validAsidVaddr); return size; }
1892663Sstever@eecs.umich.edu    /** Accessor for time. */
1902663Sstever@eecs.umich.edu    Tick getTime() { assert(validPaddr || validAsidVaddr); return time; }
1912663Sstever@eecs.umich.edu
1922663Sstever@eecs.umich.edu    /** Accessor for flags. */
1932663Sstever@eecs.umich.edu    uint32_t getFlags() { assert(validPaddr || validAsidVaddr); return flags; }
1942663Sstever@eecs.umich.edu    /** Accessor for paddr. */
1952663Sstever@eecs.umich.edu    void setFlags(uint32_t _flags)
1962663Sstever@eecs.umich.edu    { assert(validPaddr || validAsidVaddr); flags = _flags; }
1972663Sstever@eecs.umich.edu
1982663Sstever@eecs.umich.edu    /** Accessor function for vaddr.*/
1992663Sstever@eecs.umich.edu    Addr getVaddr() { assert(validAsidVaddr); return vaddr; }
2002663Sstever@eecs.umich.edu
2012663Sstever@eecs.umich.edu    /** Accessor function for asid.*/
2022663Sstever@eecs.umich.edu    int getAsid() { assert(validAsidVaddr); return asid; }
2032663Sstever@eecs.umich.edu
2042663Sstever@eecs.umich.edu    /** Accessor function for store conditional return value.*/
2052663Sstever@eecs.umich.edu    uint64_t getScResult() { assert(validScResult); return scResult; }
2062663Sstever@eecs.umich.edu    /** Accessor function for store conditional return value.*/
2072663Sstever@eecs.umich.edu    void setScResult(uint64_t _scResult)
2082663Sstever@eecs.umich.edu    { scResult = _scResult; validScResult = true; }
2092663Sstever@eecs.umich.edu
2102663Sstever@eecs.umich.edu    /** Accessor function for cpu number.*/
2112663Sstever@eecs.umich.edu    int getCpuNum() { assert(validCpuAndThreadNums); return cpuNum; }
2122663Sstever@eecs.umich.edu    /** Accessor function for thread number.*/
2132663Sstever@eecs.umich.edu    int getThreadNum()  { assert(validCpuAndThreadNums); return threadNum; }
2142663Sstever@eecs.umich.edu
2152663Sstever@eecs.umich.edu    /** Accessor function for pc.*/
2162663Sstever@eecs.umich.edu    Addr getPC() { assert(validPC); return pc; }
2172532SN/A
2182641Sstever@eecs.umich.edu    friend class Packet;
2192384SN/A};
2202381SN/A
2212381SN/A#endif // __MEM_REQUEST_HH__
222