qport.hh revision 13564:9bbd53a77887
11689SN/A/* 22326SN/A * Copyright (c) 2012,2015 ARM Limited 31689SN/A * All rights reserved. 41689SN/A * 51689SN/A * The license below extends only to copyright in the software and shall 61689SN/A * not be construed as granting a license to any other intellectual 71689SN/A * property including but not limited to intellectual property relating 81689SN/A * to a hardware implementation of the functionality of the software 91689SN/A * licensed hereunder. You may use the software subject to the license 101689SN/A * terms below provided that you ensure that this notice is replicated 111689SN/A * unmodified and in its entirety in all distributions of the software, 121689SN/A * modified or unmodified, in source code or in binary form. 131689SN/A * 141689SN/A * Redistribution and use in source and binary forms, with or without 151689SN/A * modification, are permitted provided that the following conditions are 161689SN/A * met: redistributions of source code must retain the above copyright 171689SN/A * notice, this list of conditions and the following disclaimer; 181689SN/A * redistributions in binary form must reproduce the above copyright 191689SN/A * notice, this list of conditions and the following disclaimer in the 201689SN/A * documentation and/or other materials provided with the distribution; 211689SN/A * neither the name of the copyright holders nor the names of its 221689SN/A * contributors may be used to endorse or promote products derived from 231689SN/A * this software without specific prior written permission. 241689SN/A * 251689SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 261689SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 272665Ssaidi@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 282665Ssaidi@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 292831Sksewell@umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 301689SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 311689SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 322064SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 331060SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 341060SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 354167Sbinkertn@umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 361689SN/A * 372292SN/A * Authors: Andreas Hansson 381717SN/A */ 391060SN/A 401061SN/A#ifndef __MEM_QPORT_HH__ 412292SN/A#define __MEM_QPORT_HH__ 422292SN/A 432292SN/A/** 442292SN/A * @file 452326SN/A * Declaration of the queued port. 461060SN/A */ 472292SN/A 482292SN/A#include "mem/packet_queue.hh" 492292SN/A#include "mem/port.hh" 502292SN/A 512292SN/A/** 522292SN/A * A queued port is a port that has an infinite queue for outgoing 532292SN/A * packets and thus decouples the module that wants to send 542326SN/A * request/responses from the flow control (retry mechanism) of the 552292SN/A * port. A queued port can be used by both a master and a slave. The 562292SN/A * queue is a parameter to allow tailoring of the queue implementation 572292SN/A * (used in the cache). 582292SN/A */ 592292SN/Aclass QueuedSlavePort : public SlavePort 602292SN/A{ 612292SN/A 622292SN/A protected: 632292SN/A 642292SN/A /** Packet queue used to store outgoing responses. */ 652292SN/A RespPacketQueue &respQueue; 662292SN/A 674329Sktlim@umich.edu void recvRespRetry() { respQueue.retry(); } 684329Sktlim@umich.edu 694329Sktlim@umich.edu public: 704329Sktlim@umich.edu 714329Sktlim@umich.edu /** 722292SN/A * Create a QueuedPort with a given name, owner, and a supplied 732292SN/A * implementation of a packet queue. The external definition of 742292SN/A * the queue enables e.g. the cache to implement a specific queue 752292SN/A * behaviuor in a subclass, and provide the latter to the 762292SN/A * QueuePort constructor. 772292SN/A */ 782292SN/A QueuedSlavePort(const std::string& name, MemObject* owner, 792292SN/A RespPacketQueue &resp_queue, PortID id = InvalidPortID) : 802307SN/A SlavePort(name, owner, id), respQueue(resp_queue) 812307SN/A { } 822292SN/A 831060SN/A virtual ~QueuedSlavePort() { } 841060SN/A 851060SN/A /** 861060SN/A * Schedule the sending of a timing response. 871060SN/A * 881060SN/A * @param pkt Packet to send 892326SN/A * @param when Absolute time (in ticks) to send packet 901060SN/A */ 911060SN/A void schedTimingResp(PacketPtr pkt, Tick when) 921060SN/A { respQueue.schedSendTiming(pkt, when); } 931060SN/A 942292SN/A /** Check the list of buffered packets against the supplied 952292SN/A * functional request. */ 962292SN/A bool trySatisfyFunctional(PacketPtr pkt) 972292SN/A { return respQueue.trySatisfyFunctional(pkt); } 981060SN/A}; 991060SN/A 1002307SN/A/** 1012292SN/A * The QueuedMasterPort combines two queues, a request queue and a 1022980Sgblack@eecs.umich.edu * snoop response queue, that both share the same port. The flow 1032292SN/A * control for requests and snoop responses are completely 1042292SN/A * independent, and so each queue manages its own flow control 1052292SN/A * (retries). 1062292SN/A */ 1072292SN/Aclass QueuedMasterPort : public MasterPort 1082292SN/A{ 1092292SN/A 1102292SN/A protected: 1112292SN/A 1122292SN/A /** Packet queue used to store outgoing requests. */ 1132292SN/A ReqPacketQueue &reqQueue; 1142292SN/A 1152292SN/A /** Packet queue used to store outgoing snoop responses. */ 1162292SN/A SnoopRespPacketQueue &snoopRespQueue; 1172292SN/A 1182292SN/A void recvReqRetry() { reqQueue.retry(); } 1192292SN/A 1202292SN/A void recvRetrySnoopResp() { snoopRespQueue.retry(); } 1212292SN/A 1222292SN/A public: 1232292SN/A 1242292SN/A /** 1252292SN/A * Create a QueuedPort with a given name, owner, and a supplied 1262292SN/A * implementation of two packet queues. The external definition of 1272292SN/A * the queues enables e.g. the cache to implement a specific queue 1282831Sksewell@umich.edu * behaviuor in a subclass, and provide the latter to the 1292292SN/A * QueuePort constructor. 1302292SN/A */ 1312292SN/A QueuedMasterPort(const std::string& name, MemObject* owner, 1322292SN/A ReqPacketQueue &req_queue, 1332292SN/A SnoopRespPacketQueue &snoop_resp_queue, 1342292SN/A PortID id = InvalidPortID) : 1352292SN/A MasterPort(name, owner, id), reqQueue(req_queue), 1362292SN/A snoopRespQueue(snoop_resp_queue) 1372292SN/A { } 1382292SN/A 1392292SN/A virtual ~QueuedMasterPort() { } 1402292SN/A 1412292SN/A /** 1422831Sksewell@umich.edu * Schedule the sending of a timing request. 1432292SN/A * 1442292SN/A * @param pkt Packet to send 1452292SN/A * @param when Absolute time (in ticks) to send packet 1462292SN/A */ 1472292SN/A void schedTimingReq(PacketPtr pkt, Tick when) 1482292SN/A { reqQueue.schedSendTiming(pkt, when); } 1492292SN/A 1502292SN/A /** 1512292SN/A * Schedule the sending of a timing snoop response. 1522292SN/A * 1532326SN/A * @param pkt Packet to send 1542348SN/A * @param when Absolute time (in ticks) to send packet 1552326SN/A */ 1562326SN/A void schedTimingSnoopResp(PacketPtr pkt, Tick when) 1572348SN/A { snoopRespQueue.schedSendTiming(pkt, when); } 1582292SN/A 1592292SN/A /** Check the list of buffered packets against the supplied 1602292SN/A * functional request. */ 1612292SN/A bool trySatisfyFunctional(PacketPtr pkt) 1622292SN/A { 1632292SN/A return reqQueue.trySatisfyFunctional(pkt) || 1642292SN/A snoopRespQueue.trySatisfyFunctional(pkt); 1651060SN/A } 1661060SN/A}; 1671061SN/A 1681060SN/A#endif // __MEM_QPORT_HH__ 1691062SN/A