112967Smatteo.andreozzi@arm.com# Copyright (c) 2018 ARM Limited 212967Smatteo.andreozzi@arm.com# All rights reserved. 312967Smatteo.andreozzi@arm.com# 412967Smatteo.andreozzi@arm.com# The license below extends only to copyright in the software and shall 512967Smatteo.andreozzi@arm.com# not be construed as granting a license to any other intellectual 612967Smatteo.andreozzi@arm.com# property including but not limited to intellectual property relating 712967Smatteo.andreozzi@arm.com# to a hardware implementation of the functionality of the software 812967Smatteo.andreozzi@arm.com# licensed hereunder. You may use the software subject to the license 912967Smatteo.andreozzi@arm.com# terms below provided that you ensure that this notice is replicated 1012967Smatteo.andreozzi@arm.com# unmodified and in its entirety in all distributions of the software, 1112967Smatteo.andreozzi@arm.com# modified or unmodified, in source code or in binary form. 1212967Smatteo.andreozzi@arm.com# 1312967Smatteo.andreozzi@arm.com# Redistribution and use in source and binary forms, with or without 1412967Smatteo.andreozzi@arm.com# modification, are permitted provided that the following conditions are 1512967Smatteo.andreozzi@arm.com# met: redistributions of source code must retain the above copyright 1612967Smatteo.andreozzi@arm.com# notice, this list of conditions and the following disclaimer; 1712967Smatteo.andreozzi@arm.com# redistributions in binary form must reproduce the above copyright 1812967Smatteo.andreozzi@arm.com# notice, this list of conditions and the following disclaimer in the 1912967Smatteo.andreozzi@arm.com# documentation and/or other materials provided with the distribution; 2012967Smatteo.andreozzi@arm.com# neither the name of the copyright holders nor the names of its 2112967Smatteo.andreozzi@arm.com# contributors may be used to endorse or promote products derived from 2212967Smatteo.andreozzi@arm.com# this software without specific prior written permission. 2312967Smatteo.andreozzi@arm.com# 2412967Smatteo.andreozzi@arm.com# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 2512967Smatteo.andreozzi@arm.com# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 2612967Smatteo.andreozzi@arm.com# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 2712967Smatteo.andreozzi@arm.com# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2812967Smatteo.andreozzi@arm.com# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2912967Smatteo.andreozzi@arm.com# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 3012967Smatteo.andreozzi@arm.com# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 3112967Smatteo.andreozzi@arm.com# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 3212967Smatteo.andreozzi@arm.com# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 3312967Smatteo.andreozzi@arm.com# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 3412967Smatteo.andreozzi@arm.com# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 3512967Smatteo.andreozzi@arm.com# 3612967Smatteo.andreozzi@arm.com# Author: Matteo Andreozzi 3712967Smatteo.andreozzi@arm.com 3812967Smatteo.andreozzi@arm.comfrom m5.params import * 3913665Sandreas.sandberg@arm.comfrom m5.objects.QoSMemCtrl import * 4012967Smatteo.andreozzi@arm.com 4112967Smatteo.andreozzi@arm.comclass QoSMemSinkCtrl(QoSMemCtrl): 4212967Smatteo.andreozzi@arm.com type = 'QoSMemSinkCtrl' 4312967Smatteo.andreozzi@arm.com cxx_header = "mem/qos/mem_sink.hh" 4412967Smatteo.andreozzi@arm.com cxx_class = "QoS::MemSinkCtrl" 4512967Smatteo.andreozzi@arm.com port = SlavePort("Slave ports") 4612967Smatteo.andreozzi@arm.com 4712967Smatteo.andreozzi@arm.com # the basic configuration of the controller architecture, note 4812967Smatteo.andreozzi@arm.com # that each entry corresponds to a burst for the specific DRAM 4912967Smatteo.andreozzi@arm.com # configuration (e.g. x32 with burst length 8 is 32 bytes) and not 5012967Smatteo.andreozzi@arm.com # the cacheline size or request/packet size 5112967Smatteo.andreozzi@arm.com write_buffer_size = Param.Unsigned(64, "Number of write queue entries") 5212967Smatteo.andreozzi@arm.com read_buffer_size = Param.Unsigned(32, "Number of read queue entries") 5312967Smatteo.andreozzi@arm.com 5412967Smatteo.andreozzi@arm.com # memory packet size 5512967Smatteo.andreozzi@arm.com memory_packet_size = Param.MemorySize("32B", "Memory packet size") 5612967Smatteo.andreozzi@arm.com 5712967Smatteo.andreozzi@arm.com # request latency - minimum timing between requests 5812967Smatteo.andreozzi@arm.com request_latency = Param.Latency("20ns", "Memory latency between requests") 5912967Smatteo.andreozzi@arm.com 6012967Smatteo.andreozzi@arm.com # response latency - time to issue a response once a request is serviced 6112967Smatteo.andreozzi@arm.com response_latency = Param.Latency("20ns", "Memory response latency") 6212967Smatteo.andreozzi@arm.com 6312967Smatteo.andreozzi@arm.com 64