port_proxy.hh revision 8706
1/* 2 * Copyright (c) 2011 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions are 16 * met: redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer; 18 * redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution; 21 * neither the name of the copyright holders nor the names of its 22 * contributors may be used to endorse or promote products derived from 23 * this software without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 36 * 37 * Authors: Andreas Hansson 38 */ 39 40/** 41 * @file 42 * PortProxy Object Declaration. 43 * 44 * Port proxies are used when non structural entities need access to 45 * the memory system. Proxy objects replace the previous 46 * FunctionalPort, TranslatingPort and VirtualPort objects, which 47 * provided the same functionality as the proxies, but were instances 48 * of ports not corresponding to real structural ports of the 49 * simulated system. Via the port proxies all the accesses go through 50 * an actual port and thus are transparent to a potentially 51 * distributed memory and automatically adhere to the memory map of 52 * the system. 53 */ 54 55#ifndef __MEM_PORT_PROXY_HH__ 56#define __MEM_PORT_PROXY_HH__ 57 58#include "config/the_isa.hh" 59#if THE_ISA != NO_ISA 60 #include "arch/isa_traits.hh" 61#endif 62 63#include "base/types.hh" 64#include "mem/port.hh" 65#include "sim/byteswap.hh" 66 67/** 68 * This object is a proxy for a structural port, 69 * to be used for debug accesses. 70 * 71 * This proxy object is used when non structural entities 72 * (e.g. thread contexts, object file loaders) need access to the 73 * memory system. It calls the corresponding functions on the underlying 74 * structural port, and provides templatized convenience access functions. 75 * 76 * The addresses are interpreted as physical addresses. 77 * 78 * @sa SETranslatingProxy 79 * @sa FSTranslatingProxy 80 */ 81class PortProxy 82{ 83 protected: 84 Port &_port; 85 86 public: 87 PortProxy(Port &port) : _port(port) { } 88 virtual ~PortProxy() { } 89 90 public: 91 /** 92 * Read size bytes memory at address and store in p. 93 */ 94 virtual void readBlob(Addr address, uint8_t* p, int size) 95 { _port.readBlob(address, p, size); } 96 97 /** 98 * Write size bytes from p to address. 99 */ 100 virtual void writeBlob(Addr address, uint8_t* p, int size) 101 { _port.writeBlob(address, p, size); } 102 103 /** 104 * Fill size bytes starting at addr with byte value val. 105 */ 106 virtual void memsetBlob(Addr address, uint8_t v, int size) 107 { _port.memsetBlob(address, v, size); } 108 109 /** 110 * Read sizeof(T) bytes from address and return as object T. 111 */ 112 template <typename T> 113 T read(Addr address); 114 115 /** 116 * Write object T to address. Writes sizeof(T) bytes. 117 */ 118 template <typename T> 119 void write(Addr address, T data); 120 121#if THE_ISA != NO_ISA 122 /** 123 * Read sizeof(T) bytes from address and return as object T. 124 * Performs Guest to Host endianness transform. 125 */ 126 template <typename T> 127 T readGtoH(Addr address); 128 129 /** 130 * Write object T to address. Writes sizeof(T) bytes. 131 * Performs Host to Guest endianness transform. 132 */ 133 template <typename T> 134 void writeHtoG(Addr address, T data); 135#endif 136}; 137 138 139template <typename T> 140T 141PortProxy::read(Addr address) 142{ 143 T data; 144 readBlob(address, (uint8_t*)&data, sizeof(T)); 145 return data; 146} 147 148template <typename T> 149void 150PortProxy::write(Addr address, T data) 151{ 152 writeBlob(address, (uint8_t*)&data, sizeof(T)); 153} 154 155#if THE_ISA != NO_ISA 156template <typename T> 157T 158PortProxy::readGtoH(Addr address) 159{ 160 T data; 161 readBlob(address, (uint8_t*)&data, sizeof(T)); 162 return TheISA::gtoh(data); 163} 164 165template <typename T> 166void 167PortProxy::writeHtoG(Addr address, T data) 168{ 169 data = TheISA::htog(data); 170 writeBlob(address, (uint8_t*)&data, sizeof(T)); 171} 172#endif 173 174#endif // __MEM_PORT_PROXY_HH__ 175