port.cc revision 9294
1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2002-2005 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Steve Reinhardt
41 *          Andreas Hansson
42 *          William Wang
43 */
44
45/**
46 * @file
47 * Port object definitions.
48 */
49#include "base/trace.hh"
50#include "mem/mem_object.hh"
51#include "mem/port.hh"
52
53Port::Port(const std::string &_name, MemObject& _owner, PortID _id)
54    : portName(_name), id(_id), owner(_owner)
55{
56}
57
58Port::~Port()
59{
60}
61
62BaseMasterPort::BaseMasterPort(const std::string& name, MemObject* owner,
63                               PortID _id)
64    : Port(name, *owner, _id), _baseSlavePort(NULL)
65{
66}
67
68BaseMasterPort::~BaseMasterPort()
69{
70}
71
72BaseSlavePort&
73BaseMasterPort::getSlavePort() const
74{
75    if(_baseSlavePort == NULL)
76        panic("Cannot getSlavePort on master port %s that is not connected\n",
77              name());
78
79    return *_baseSlavePort;
80}
81
82bool
83BaseMasterPort::isConnected() const
84{
85    return _baseSlavePort != NULL;
86}
87
88BaseSlavePort::BaseSlavePort(const std::string& name, MemObject* owner,
89                             PortID _id)
90    : Port(name, *owner, _id), _baseMasterPort(NULL)
91{
92}
93
94BaseSlavePort::~BaseSlavePort()
95{
96}
97
98BaseMasterPort&
99BaseSlavePort::getMasterPort() const
100{
101    if(_baseMasterPort == NULL)
102        panic("Cannot getMasterPort on slave port %s that is not connected\n",
103              name());
104
105    return *_baseMasterPort;
106}
107
108bool
109BaseSlavePort::isConnected() const
110{
111    return _baseMasterPort != NULL;
112}
113
114/**
115 * Master port
116 */
117MasterPort::MasterPort(const std::string& name, MemObject* owner, PortID _id)
118    : BaseMasterPort(name, owner, _id), _slavePort(NULL)
119{
120}
121
122MasterPort::~MasterPort()
123{
124}
125
126void
127MasterPort::bind(BaseSlavePort& slave_port)
128{
129    // bind on the level of the base ports
130    _baseSlavePort = &slave_port;
131
132    // also attempt to base the slave to the appropriate type
133    SlavePort* cast_slave_port = dynamic_cast<SlavePort*>(&slave_port);
134
135    // if this port is compatible, then proceed with the binding
136    if (cast_slave_port != NULL) {
137        // master port keeps track of the slave port
138        _slavePort = cast_slave_port;
139        // slave port also keeps track of master port
140        _slavePort->bind(*this);
141    } else {
142        fatal("Master port %s cannot bind to %s\n", name(),
143              slave_port.name());
144    }
145}
146
147void
148MasterPort::unbind()
149{
150    if (_slavePort == NULL)
151        panic("Attempting to unbind master port %s that is not connected\n",
152              name());
153    _slavePort->unbind();
154    _slavePort = NULL;
155    _baseSlavePort = NULL;
156}
157
158unsigned
159MasterPort::peerBlockSize() const
160{
161    return _slavePort->deviceBlockSize();
162}
163
164AddrRangeList
165MasterPort::getAddrRanges() const
166{
167    return _slavePort->getAddrRanges();
168}
169
170Tick
171MasterPort::sendAtomic(PacketPtr pkt)
172{
173    assert(pkt->isRequest());
174    return _slavePort->recvAtomic(pkt);
175}
176
177void
178MasterPort::sendFunctional(PacketPtr pkt)
179{
180    assert(pkt->isRequest());
181    return _slavePort->recvFunctional(pkt);
182}
183
184bool
185MasterPort::sendTimingReq(PacketPtr pkt)
186{
187    assert(pkt->isRequest());
188    return _slavePort->recvTimingReq(pkt);
189}
190
191bool
192MasterPort::sendTimingSnoopResp(PacketPtr pkt)
193{
194    assert(pkt->isResponse());
195    return _slavePort->recvTimingSnoopResp(pkt);
196}
197
198void
199MasterPort::sendRetry()
200{
201    _slavePort->recvRetry();
202}
203
204void
205MasterPort::printAddr(Addr a)
206{
207    Request req(a, 1, 0, Request::funcMasterId);
208    Packet pkt(&req, MemCmd::PrintReq);
209    Packet::PrintReqState prs(std::cerr);
210    pkt.senderState = &prs;
211
212    sendFunctional(&pkt);
213}
214
215/**
216 * Slave port
217 */
218SlavePort::SlavePort(const std::string& name, MemObject* owner, PortID id)
219    : BaseSlavePort(name, owner, id), _masterPort(NULL)
220{
221}
222
223SlavePort::~SlavePort()
224{
225}
226
227void
228SlavePort::unbind()
229{
230    _baseMasterPort = NULL;
231    _masterPort = NULL;
232}
233
234void
235SlavePort::bind(MasterPort& master_port)
236{
237    _baseMasterPort = &master_port;
238    _masterPort = &master_port;
239}
240
241unsigned
242SlavePort::peerBlockSize() const
243{
244    return _masterPort->deviceBlockSize();
245}
246
247Tick
248SlavePort::sendAtomicSnoop(PacketPtr pkt)
249{
250    assert(pkt->isRequest());
251    return _masterPort->recvAtomicSnoop(pkt);
252}
253
254void
255SlavePort::sendFunctionalSnoop(PacketPtr pkt)
256{
257    assert(pkt->isRequest());
258    return _masterPort->recvFunctionalSnoop(pkt);
259}
260
261bool
262SlavePort::sendTimingResp(PacketPtr pkt)
263{
264    assert(pkt->isResponse());
265    return _masterPort->recvTimingResp(pkt);
266}
267
268void
269SlavePort::sendTimingSnoopReq(PacketPtr pkt)
270{
271    assert(pkt->isRequest());
272    _masterPort->recvTimingSnoopReq(pkt);
273}
274
275void
276SlavePort::sendRetry()
277{
278    _masterPort->recvRetry();
279}
280