physical.hh revision 8922:17f037ad8918
1/* 2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Ron Dreslinski 29 */ 30 31/* @file 32 */ 33 34#ifndef __PHYSICAL_MEMORY_HH__ 35#define __PHYSICAL_MEMORY_HH__ 36 37#include <map> 38#include <string> 39 40#include "base/range.hh" 41#include "base/statistics.hh" 42#include "mem/mem_object.hh" 43#include "mem/packet.hh" 44#include "mem/tport.hh" 45#include "params/PhysicalMemory.hh" 46#include "sim/eventq.hh" 47#include "sim/stats.hh" 48 49// 50// Functional model for a contiguous block of physical memory. (i.e. RAM) 51// 52class PhysicalMemory : public MemObject 53{ 54 protected: 55 56 class MemoryPort : public SimpleTimingPort 57 { 58 PhysicalMemory *memory; 59 60 public: 61 62 MemoryPort(const std::string &_name, PhysicalMemory *_memory); 63 64 protected: 65 66 virtual Tick recvAtomic(PacketPtr pkt); 67 68 virtual void recvFunctional(PacketPtr pkt); 69 70 virtual AddrRangeList getAddrRanges(); 71 72 virtual unsigned deviceBlockSize() const; 73 }; 74 75 int numPorts; 76 77 78 private: 79 // prevent copying of a MainMemory object 80 PhysicalMemory(const PhysicalMemory &specmem); 81 const PhysicalMemory &operator=(const PhysicalMemory &specmem); 82 83 protected: 84 85 class LockedAddr { 86 public: 87 // on alpha, minimum LL/SC granularity is 16 bytes, so lower 88 // bits need to masked off. 89 static const Addr Addr_Mask = 0xf; 90 91 static Addr mask(Addr paddr) { return (paddr & ~Addr_Mask); } 92 93 Addr addr; // locked address 94 int contextId; // locking hw context 95 96 // check for matching execution context 97 bool matchesContext(Request *req) 98 { 99 return (contextId == req->contextId()); 100 } 101 102 LockedAddr(Request *req) 103 : addr(mask(req->getPaddr())), 104 contextId(req->contextId()) 105 { 106 } 107 // constructor for unserialization use 108 LockedAddr(Addr _addr, int _cid) 109 : addr(_addr), contextId(_cid) 110 { 111 } 112 }; 113 114 std::list<LockedAddr> lockedAddrList; 115 116 // helper function for checkLockedAddrs(): we really want to 117 // inline a quick check for an empty locked addr list (hopefully 118 // the common case), and do the full list search (if necessary) in 119 // this out-of-line function 120 bool checkLockedAddrList(PacketPtr pkt); 121 122 // Record the address of a load-locked operation so that we can 123 // clear the execution context's lock flag if a matching store is 124 // performed 125 void trackLoadLocked(PacketPtr pkt); 126 127 // Compare a store address with any locked addresses so we can 128 // clear the lock flag appropriately. Return value set to 'false' 129 // if store operation should be suppressed (because it was a 130 // conditional store and the address was no longer locked by the 131 // requesting execution context), 'true' otherwise. Note that 132 // this method must be called on *all* stores since even 133 // non-conditional stores must clear any matching lock addresses. 134 bool writeOK(PacketPtr pkt) { 135 Request *req = pkt->req; 136 if (lockedAddrList.empty()) { 137 // no locked addrs: nothing to check, store_conditional fails 138 bool isLLSC = pkt->isLLSC(); 139 if (isLLSC) { 140 req->setExtraData(0); 141 } 142 return !isLLSC; // only do write if not an sc 143 } else { 144 // iterate over list... 145 return checkLockedAddrList(pkt); 146 } 147 } 148 149 uint8_t *pmemAddr; 150 Tick lat; 151 Tick lat_var; 152 std::vector<MemoryPort*> ports; 153 typedef std::vector<MemoryPort*>::iterator PortIterator; 154 155 uint64_t _size; 156 uint64_t _start; 157 158 /** Number of total bytes read from this memory */ 159 Stats::Scalar bytesRead; 160 /** Number of instruction bytes read from this memory */ 161 Stats::Scalar bytesInstRead; 162 /** Number of bytes written to this memory */ 163 Stats::Scalar bytesWritten; 164 /** Number of read requests */ 165 Stats::Scalar numReads; 166 /** Number of write requests */ 167 Stats::Scalar numWrites; 168 /** Number of other requests */ 169 Stats::Scalar numOther; 170 /** Read bandwidth from this memory */ 171 Stats::Formula bwRead; 172 /** Read bandwidth from this memory */ 173 Stats::Formula bwInstRead; 174 /** Write bandwidth from this memory */ 175 Stats::Formula bwWrite; 176 /** Total bandwidth from this memory */ 177 Stats::Formula bwTotal; 178 179 public: 180 uint64_t size() { return _size; } 181 uint64_t start() { return _start; } 182 183 public: 184 typedef PhysicalMemoryParams Params; 185 PhysicalMemory(const Params *p); 186 virtual ~PhysicalMemory(); 187 188 const Params * 189 params() const 190 { 191 return dynamic_cast<const Params *>(_params); 192 } 193 194 public: 195 unsigned deviceBlockSize() const; 196 AddrRangeList getAddrRanges(); 197 virtual SlavePort &getSlavePort(const std::string &if_name, int idx = -1); 198 void virtual init(); 199 unsigned int drain(Event *de); 200 201 protected: 202 Tick doAtomicAccess(PacketPtr pkt); 203 void doFunctionalAccess(PacketPtr pkt); 204 virtual Tick calculateLatency(PacketPtr pkt); 205 206 public: 207 /** 208 * Register Statistics 209 */ 210 void regStats(); 211 212 virtual void serialize(std::ostream &os); 213 virtual void unserialize(Checkpoint *cp, const std::string §ion); 214 215}; 216 217#endif //__PHYSICAL_MEMORY_HH__ 218