physical.hh revision 3349:fec4a86fa212
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ron Dreslinski
29 */
30
31/* @file
32 */
33
34#ifndef __PHYSICAL_MEMORY_HH__
35#define __PHYSICAL_MEMORY_HH__
36
37#include "base/range.hh"
38#include "mem/mem_object.hh"
39#include "mem/packet.hh"
40#include "mem/tport.hh"
41#include "sim/eventq.hh"
42#include <map>
43#include <string>
44
45//
46// Functional model for a contiguous block of physical memory. (i.e. RAM)
47//
48class PhysicalMemory : public MemObject
49{
50    class MemoryPort : public SimpleTimingPort
51    {
52        PhysicalMemory *memory;
53
54      public:
55
56        MemoryPort(const std::string &_name, PhysicalMemory *_memory);
57
58      protected:
59
60        virtual Tick recvAtomic(PacketPtr pkt);
61
62        virtual void recvFunctional(PacketPtr pkt);
63
64        virtual void recvStatusChange(Status status);
65
66        virtual void getDeviceAddressRanges(AddrRangeList &resp,
67                                            AddrRangeList &snoop);
68
69        virtual int deviceBlockSize();
70    };
71
72    int numPorts;
73
74
75  private:
76    // prevent copying of a MainMemory object
77    PhysicalMemory(const PhysicalMemory &specmem);
78    const PhysicalMemory &operator=(const PhysicalMemory &specmem);
79
80  protected:
81
82    class LockedAddr {
83      public:
84        // on alpha, minimum LL/SC granularity is 16 bytes, so lower
85        // bits need to masked off.
86        static const Addr Addr_Mask = 0xf;
87
88        static Addr mask(Addr paddr) { return (paddr & ~Addr_Mask); }
89
90        Addr addr; 	// locked address
91        int cpuNum;	// locking CPU
92        int threadNum;	// locking thread ID within CPU
93
94        // check for matching execution context
95        bool matchesContext(Request *req)
96        {
97            return (cpuNum == req->getCpuNum() &&
98                    threadNum == req->getThreadNum());
99        }
100
101        LockedAddr(Request *req)
102            : addr(mask(req->getPaddr())),
103              cpuNum(req->getCpuNum()),
104              threadNum(req->getThreadNum())
105        {
106        }
107    };
108
109    std::list<LockedAddr> lockedAddrList;
110
111    // helper function for checkLockedAddrs(): we really want to
112    // inline a quick check for an empty locked addr list (hopefully
113    // the common case), and do the full list search (if necessary) in
114    // this out-of-line function
115    bool checkLockedAddrList(Request *req);
116
117    // Record the address of a load-locked operation so that we can
118    // clear the execution context's lock flag if a matching store is
119    // performed
120    void trackLoadLocked(Request *req);
121
122    // Compare a store address with any locked addresses so we can
123    // clear the lock flag appropriately.  Return value set to 'false'
124    // if store operation should be suppressed (because it was a
125    // conditional store and the address was no longer locked by the
126    // requesting execution context), 'true' otherwise.  Note that
127    // this method must be called on *all* stores since even
128    // non-conditional stores must clear any matching lock addresses.
129    bool writeOK(Request *req) {
130        if (lockedAddrList.empty()) {
131            // no locked addrs: nothing to check, store_conditional fails
132            bool isLocked = req->isLocked();
133            if (isLocked) {
134                req->setScResult(0);
135            }
136            return !isLocked; // only do write if not an sc
137        } else {
138            // iterate over list...
139            return checkLockedAddrList(req);
140        }
141    }
142
143    uint8_t *pmemAddr;
144    MemoryPort *port;
145    int pagePtr;
146    Tick lat;
147
148  public:
149    Addr new_page();
150    uint64_t size() { return params()->addrRange.size(); }
151
152    struct Params
153    {
154        std::string name;
155        Range<Addr> addrRange;
156        Tick latency;
157    };
158
159  protected:
160    Params *_params;
161
162  public:
163    const Params *params() const { return _params; }
164    PhysicalMemory(Params *p);
165    virtual ~PhysicalMemory();
166
167  public:
168    int deviceBlockSize();
169    void getAddressRanges(AddrRangeList &resp, AddrRangeList &snoop);
170    virtual Port *getPort(const std::string &if_name, int idx = -1);
171    void virtual init();
172    unsigned int drain(Event *de);
173
174  protected:
175    void doFunctionalAccess(PacketPtr pkt);
176    virtual Tick calculateLatency(PacketPtr pkt);
177    void recvStatusChange(Port::Status status);
178
179  public:
180    virtual void serialize(std::ostream &os);
181    virtual void unserialize(Checkpoint *cp, const std::string &section);
182
183};
184
185#endif //__PHYSICAL_MEMORY_HH__
186