page_table.hh revision 8601:af28085882dc
113558Snikos.nikoleris@arm.com/* 28839Sandreas.hansson@arm.com * Copyright (c) 2003 The Regents of The University of Michigan 38839Sandreas.hansson@arm.com * All rights reserved. 48839Sandreas.hansson@arm.com * 58839Sandreas.hansson@arm.com * Redistribution and use in source and binary forms, with or without 68839Sandreas.hansson@arm.com * modification, are permitted provided that the following conditions are 78839Sandreas.hansson@arm.com * met: redistributions of source code must retain the above copyright 88839Sandreas.hansson@arm.com * notice, this list of conditions and the following disclaimer; 98839Sandreas.hansson@arm.com * redistributions in binary form must reproduce the above copyright 108839Sandreas.hansson@arm.com * notice, this list of conditions and the following disclaimer in the 118839Sandreas.hansson@arm.com * documentation and/or other materials provided with the distribution; 128839Sandreas.hansson@arm.com * neither the name of the copyright holders nor the names of its 133101Sstever@eecs.umich.edu * contributors may be used to endorse or promote products derived from 148579Ssteve.reinhardt@amd.com * this software without specific prior written permission. 153101Sstever@eecs.umich.edu * 163101Sstever@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 173101Sstever@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 183101Sstever@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 193101Sstever@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 203101Sstever@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 213101Sstever@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 223101Sstever@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 233101Sstever@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 243101Sstever@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 253101Sstever@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 263101Sstever@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 273101Sstever@eecs.umich.edu * 283101Sstever@eecs.umich.edu * Authors: Steve Reinhardt 293101Sstever@eecs.umich.edu */ 303101Sstever@eecs.umich.edu 313101Sstever@eecs.umich.edu/** 323101Sstever@eecs.umich.edu * @file 333101Sstever@eecs.umich.edu * Declaration of a non-full system Page Table. 343101Sstever@eecs.umich.edu */ 353101Sstever@eecs.umich.edu 363101Sstever@eecs.umich.edu#ifndef __MEM_PAGE_TABLE_HH__ 373101Sstever@eecs.umich.edu#define __MEM_PAGE_TABLE_HH__ 383101Sstever@eecs.umich.edu 393101Sstever@eecs.umich.edu#include <string> 403101Sstever@eecs.umich.edu 413101Sstever@eecs.umich.edu#include "arch/isa_traits.hh" 427778Sgblack@eecs.umich.edu#include "arch/tlb.hh" 438839Sandreas.hansson@arm.com#include "base/hashmap.hh" 443101Sstever@eecs.umich.edu#include "base/types.hh" 453101Sstever@eecs.umich.edu#include "config/the_isa.hh" 463101Sstever@eecs.umich.edu#include "mem/request.hh" 473101Sstever@eecs.umich.edu#include "sim/serialize.hh" 483101Sstever@eecs.umich.edu 493101Sstever@eecs.umich.edu/** 503101Sstever@eecs.umich.edu * Page Table Declaration. 513101Sstever@eecs.umich.edu */ 523101Sstever@eecs.umich.educlass PageTable 533101Sstever@eecs.umich.edu{ 543101Sstever@eecs.umich.edu protected: 553101Sstever@eecs.umich.edu typedef m5::hash_map<Addr, TheISA::TlbEntry> PTable; 563101Sstever@eecs.umich.edu typedef PTable::iterator PTableItr; 573101Sstever@eecs.umich.edu PTable pTable; 583101Sstever@eecs.umich.edu 593101Sstever@eecs.umich.edu struct cacheElement { 603101Sstever@eecs.umich.edu Addr vaddr; 613101Sstever@eecs.umich.edu TheISA::TlbEntry entry; 6212563Sgabeblack@google.com }; 6312563Sgabeblack@google.com 643885Sbinkertn@umich.edu struct cacheElement pTableCache[3]; 653885Sbinkertn@umich.edu 664762Snate@binkert.org const Addr pageSize; 673885Sbinkertn@umich.edu const Addr offsetMask; 683885Sbinkertn@umich.edu 697528Ssteve.reinhardt@amd.com const uint64_t pid; 703885Sbinkertn@umich.edu const std::string _name; 714380Sbinkertn@umich.edu 724167Sbinkertn@umich.edu public: 733102Sstever@eecs.umich.edu 743101Sstever@eecs.umich.edu PageTable(const std::string &__name, uint64_t _pid, 754762Snate@binkert.org Addr _pageSize = TheISA::VMPageSize); 764762Snate@binkert.org 774762Snate@binkert.org ~PageTable(); 784762Snate@binkert.org 794762Snate@binkert.org // for DPRINTF compatibility 804762Snate@binkert.org const std::string name() const { return _name; } 814762Snate@binkert.org 824762Snate@binkert.org Addr pageAlign(Addr a) { return (a & ~offsetMask); } 834762Snate@binkert.org Addr pageOffset(Addr a) { return (a & offsetMask); } 845033Smilesck@eecs.umich.edu 855033Smilesck@eecs.umich.edu void map(Addr vaddr, Addr paddr, int64_t size, bool clobber = false); 865033Smilesck@eecs.umich.edu void remap(Addr vaddr, int64_t size, Addr new_vaddr); 875033Smilesck@eecs.umich.edu void unmap(Addr vaddr, int64_t size); 885033Smilesck@eecs.umich.edu 895033Smilesck@eecs.umich.edu /** 905033Smilesck@eecs.umich.edu * Check if any pages in a region are already allocated 915033Smilesck@eecs.umich.edu * @param vaddr The starting virtual address of the region. 925033Smilesck@eecs.umich.edu * @param size The length of the region. 935033Smilesck@eecs.umich.edu * @return True if no pages in the region are mapped. 943101Sstever@eecs.umich.edu */ 953101Sstever@eecs.umich.edu bool isUnmapped(Addr vaddr, int64_t size); 963101Sstever@eecs.umich.edu 975033Smilesck@eecs.umich.edu /** 9810267SGeoffrey.Blake@arm.com * Lookup function 998596Ssteve.reinhardt@amd.com * @param vaddr The virtual address. 1008596Ssteve.reinhardt@amd.com * @return entry The page table entry corresponding to vaddr. 1018596Ssteve.reinhardt@amd.com */ 1028596Ssteve.reinhardt@amd.com bool lookup(Addr vaddr, TheISA::TlbEntry &entry); 1037673Snate@binkert.org 1047673Snate@binkert.org /** 1057673Snate@binkert.org * Translate function 1067673Snate@binkert.org * @param vaddr The virtual address. 10711988Sandreas.sandberg@arm.com * @param paddr Physical address from translation. 10811988Sandreas.sandberg@arm.com * @return True if translation exists 10911988Sandreas.sandberg@arm.com */ 11011988Sandreas.sandberg@arm.com bool translate(Addr vaddr, Addr &paddr); 1113101Sstever@eecs.umich.edu 1123101Sstever@eecs.umich.edu /** 1133101Sstever@eecs.umich.edu * Simplified translate function (just check for translation) 1143101Sstever@eecs.umich.edu * @param vaddr The virtual address. 1153101Sstever@eecs.umich.edu * @return True if translation exists 11610380SAndrew.Bardsley@arm.com */ 11710380SAndrew.Bardsley@arm.com bool translate(Addr vaddr) { Addr dummy; return translate(vaddr, dummy); } 11810380SAndrew.Bardsley@arm.com 11910380SAndrew.Bardsley@arm.com /** 12010380SAndrew.Bardsley@arm.com * Perform a translation on the memory request, fills in paddr 12110380SAndrew.Bardsley@arm.com * field of req. 12210458Sandreas.hansson@arm.com * @param req The memory request. 12310458Sandreas.hansson@arm.com */ 12410458Sandreas.hansson@arm.com Fault translate(RequestPtr req); 12510458Sandreas.hansson@arm.com 12610458Sandreas.hansson@arm.com /** 12710458Sandreas.hansson@arm.com * Update the page table cache. 12810458Sandreas.hansson@arm.com * @param vaddr virtual address (page aligned) to check 12910458Sandreas.hansson@arm.com * @param pte page table entry to return 13010458Sandreas.hansson@arm.com */ 13110458Sandreas.hansson@arm.com inline void updateCache(Addr vaddr, TheISA::TlbEntry entry) 13210458Sandreas.hansson@arm.com { 13310458Sandreas.hansson@arm.com pTableCache[2].entry = pTableCache[1].entry; 1343101Sstever@eecs.umich.edu pTableCache[2].vaddr = pTableCache[1].vaddr; 1353101Sstever@eecs.umich.edu pTableCache[1].entry = pTableCache[0].entry; 1363101Sstever@eecs.umich.edu pTableCache[1].vaddr = pTableCache[0].vaddr; 1373101Sstever@eecs.umich.edu pTableCache[0].entry = entry; 1383101Sstever@eecs.umich.edu pTableCache[0].vaddr = vaddr; 13910267SGeoffrey.Blake@arm.com } 14010267SGeoffrey.Blake@arm.com 14110267SGeoffrey.Blake@arm.com 14210267SGeoffrey.Blake@arm.com void serialize(std::ostream &os); 1433101Sstever@eecs.umich.edu 1443101Sstever@eecs.umich.edu void unserialize(Checkpoint *cp, const std::string §ion); 1453101Sstever@eecs.umich.edu}; 1463101Sstever@eecs.umich.edu 1473101Sstever@eecs.umich.edu#endif // __MEM_PAGE_TABLE_HH__ 1483101Sstever@eecs.umich.edu