packet_queue.hh revision 8229
1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Ali Saidi 29 */ 30 31#ifndef __MEM_TPORT_HH__ 32#define __MEM_TPORT_HH__ 33 34/** 35 * @file 36 * 37 * Declaration of SimpleTimingPort. 38 */ 39 40#include <list> 41#include <string> 42 43#include "mem/port.hh" 44#include "sim/eventq.hh" 45 46/** 47 * A simple port for interfacing objects that basically have only 48 * functional memory behavior (e.g. I/O devices) to the memory system. 49 * Both timing and functional accesses are implemented in terms of 50 * atomic accesses. A derived port class thus only needs to provide 51 * recvAtomic() to support all memory access modes. 52 * 53 * The tricky part is handling recvTiming(), where the response must 54 * be scheduled separately via a later call to sendTiming(). This 55 * feature is handled by scheduling an internal event that calls 56 * sendTiming() after a delay, and optionally rescheduling the 57 * response if it is nacked. 58 */ 59class SimpleTimingPort : public Port 60{ 61 protected: 62 /** A deferred packet, buffered to transmit later. */ 63 class DeferredPacket { 64 public: 65 Tick tick; ///< The tick when the packet is ready to transmit 66 PacketPtr pkt; ///< Pointer to the packet to transmit 67 DeferredPacket(Tick t, PacketPtr p) 68 : tick(t), pkt(p) 69 {} 70 }; 71 72 typedef std::list<DeferredPacket> DeferredPacketList; 73 typedef std::list<DeferredPacket>::iterator DeferredPacketIterator; 74 75 /** A list of outgoing timing response packets that haven't been 76 * serviced yet. */ 77 DeferredPacketList transmitList; 78 79 /** This function attempts to send deferred packets. Scheduled to 80 * be called in the future via SendEvent. */ 81 void processSendEvent(); 82 83 /** 84 * This class is used to implemented sendTiming() with a delay. When 85 * a delay is requested a the event is scheduled if it isn't already. 86 * When the event time expires it attempts to send the packet. 87 * If it cannot, the packet sent when recvRetry() is called. 88 **/ 89 Event *sendEvent; 90 91 /** If we need to drain, keep the drain event around until we're done 92 * here.*/ 93 Event *drainEvent; 94 95 /** Remember whether we're awaiting a retry from the bus. */ 96 bool waitingOnRetry; 97 98 /** Check the list of buffered packets against the supplied 99 * functional request. */ 100 bool checkFunctional(PacketPtr funcPkt); 101 102 /** Check whether we have a packet ready to go on the transmit list. */ 103 bool deferredPacketReady() 104 { return !transmitList.empty() && transmitList.front().tick <= curTick(); } 105 106 Tick deferredPacketReadyTime() 107 { return transmitList.empty() ? MaxTick : transmitList.front().tick; } 108 109 void 110 schedSendEvent(Tick when) 111 { 112 if (waitingOnRetry) { 113 assert(!sendEvent->scheduled()); 114 return; 115 } 116 117 if (!sendEvent->scheduled()) { 118 schedule(sendEvent, when); 119 } else if (sendEvent->when() > when) { 120 reschedule(sendEvent, when); 121 } 122 } 123 124 125 /** Schedule a sendTiming() event to be called in the future. 126 * @param pkt packet to send 127 * @param absolute time (in ticks) to send packet 128 */ 129 void schedSendTiming(PacketPtr pkt, Tick when); 130 131 /** Attempt to send the packet at the head of the deferred packet 132 * list. Caller must guarantee that the deferred packet list is 133 * non-empty and that the head packet is scheduled for curTick() (or 134 * earlier). 135 */ 136 void sendDeferredPacket(); 137 138 /** This function is notification that the device should attempt to send a 139 * packet again. */ 140 virtual void recvRetry(); 141 142 /** Implemented using recvAtomic(). */ 143 void recvFunctional(PacketPtr pkt); 144 145 /** Implemented using recvAtomic(). */ 146 bool recvTiming(PacketPtr pkt); 147 148 /** 149 * Simple ports generally don't care about any status 150 * changes... can always override this in cases where that's not 151 * true. */ 152 virtual void recvStatusChange(Status status) { } 153 154 155 public: 156 SimpleTimingPort(std::string pname, MemObject *_owner); 157 ~SimpleTimingPort(); 158 159 /** Hook for draining timing accesses from the system. The 160 * associated SimObject's drain() functions should be implemented 161 * something like this when this class is used: 162 \code 163 PioDevice::drain(Event *de) 164 { 165 unsigned int count; 166 count = SimpleTimingPort->drain(de); 167 if (count) 168 changeState(Draining); 169 else 170 changeState(Drained); 171 return count; 172 } 173 \endcode 174 */ 175 unsigned int drain(Event *de); 176}; 177 178#endif // __MEM_TPORT_HH__ 179