packet.hh revision 2394
12086SN/A/* 22086SN/A * Copyright (c) 2003 The Regents of The University of Michigan 32086SN/A * All rights reserved. 42086SN/A * 52086SN/A * Redistribution and use in source and binary forms, with or without 62086SN/A * modification, are permitted provided that the following conditions are 72086SN/A * met: redistributions of source code must retain the above copyright 82086SN/A * notice, this list of conditions and the following disclaimer; 92086SN/A * redistributions in binary form must reproduce the above copyright 102086SN/A * notice, this list of conditions and the following disclaimer in the 112086SN/A * documentation and/or other materials provided with the distribution; 122086SN/A * neither the name of the copyright holders nor the names of its 132086SN/A * contributors may be used to endorse or promote products derived from 142086SN/A * this software without specific prior written permission. 152086SN/A * 162086SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172086SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182086SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192086SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202086SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212086SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222086SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232086SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242086SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252086SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262086SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272086SN/A */ 282665Ssaidi@eecs.umich.edu 292665Ssaidi@eecs.umich.edu/** 302665Ssaidi@eecs.umich.edu * @file 312086SN/A * Declaration of the Packet Class, a packet is a transaction occuring 324202Sbinkertn@umich.edu * between a single level of the memory heirarchy (ie L1->L2). 332086SN/A */ 344202Sbinkertn@umich.edu 354202Sbinkertn@umich.edu#ifndef __MEM_PACKET_HH__ 364202Sbinkertn@umich.edu#define __MEM_PACKET_HH__ 376313Sgblack@eecs.umich.edu 386365Sgblack@eecs.umich.edu#include "mem/request.hh" 394997Sgblack@eecs.umich.edu#include "targetarch/isa_traits.hh" 404202Sbinkertn@umich.edu#include "sim/root.hh" 414997Sgblack@eecs.umich.edu 424826Ssaidi@eecs.umich.edustruct Packet; 432086SN/Atypedef Packet* PacketPtr; 446365Sgblack@eecs.umich.edutypedef uint8_t* PacketDataPtr; 456365Sgblack@eecs.umich.edu 464997Sgblack@eecs.umich.edu/** List of all commands associated with a packet. */ 475800Snate@binkert.orgenum Command 485938Sgblack@eecs.umich.edu{ 494997Sgblack@eecs.umich.edu Read, 504202Sbinkertn@umich.edu Write 514486Sbinkertn@umich.edu}; 525647Sgblack@eecs.umich.edu 534486Sbinkertn@umich.edu/** The result of a particular pakets request. */ 545647Sgblack@eecs.umich.eduenum PacketResult 554202Sbinkertn@umich.edu{ 564202Sbinkertn@umich.edu Success, 574202Sbinkertn@umich.edu BadAddress 584202Sbinkertn@umich.edu}; 594202Sbinkertn@umich.edu 604202Sbinkertn@umich.educlass SenderState{}; 612086SN/Aclass Coherence{}; 624202Sbinkertn@umich.edu 634202Sbinkertn@umich.edu/** 644202Sbinkertn@umich.edu * A Packet is the structure to handle requests between two levels 652086SN/A * of the memory system. The Request is a global object that trancends 664202Sbinkertn@umich.edu * all of the memory heirarchy, but at each levels interface a packet 674202Sbinkertn@umich.edu * is created to transfer data/requests. For example, a request would 682086SN/A * be used to initiate a request to go to memory/IOdevices, as the request 694202Sbinkertn@umich.edu * passes through the memory system several packets will be created. One 704202Sbinkertn@umich.edu * will be created to go between the L1 and L2 caches and another to go to 714202Sbinkertn@umich.edu * the next level and so forth. 724202Sbinkertn@umich.edu * 734202Sbinkertn@umich.edu * Packets are assumed to be returned in the case of a single response. If 744202Sbinkertn@umich.edu * the transaction has no response, then the consumer will delete the packet. 75 */ 76struct Packet 77{ 78 /** The address of the request, could be virtual or physical (depending on 79 cache configurations). */ 80 Addr addr; 81 82 /** Flag structure to hold flags for this particular packet */ 83 uint64_t flags; 84 85 /** A pointer to the overall request. */ 86 RequestPtr req; 87 88 /** A virtual base opaque structure used to hold 89 coherence status messages. */ 90 Coherence *coherence; // virtual base opaque, 91 // assert(dynamic_cast<Foo>) etc. 92 93 /** A virtual base opaque structure used to hold the senders state. */ 94 SenderState *senderState; // virtual base opaque, 95 // assert(dynamic_cast<Foo>) etc. 96 97 /** A pointer to the data being transfered. It can be differnt sizes 98 at each level of the heirarchy so it belongs in the packet, 99 not request*/ 100 PacketDataPtr data; 101 102 /** Indicates the size of the request. */ 103 int size; 104 105 /** A index of the source of the transaction. */ 106 short src; 107 108 /** A index to the destination of the transaction. */ 109 short dest; 110 111 /** The command of the transaction. */ 112 Command cmd; 113 114 /** The result of the packet transaction. */ 115 PacketResult result; 116 117 /** Accessor function that returns the source index of the packet. */ 118 short getSrc() const { return src; } 119 120 /** Accessor function that returns the destination index of 121 the packet. */ 122 short getDest() const { return dest; } 123}; 124 125#endif //__MEM_PACKET_HH 126