packet.cc revision 12821:3663a543ed2a 
1/*
2 * Copyright (c) 2011-2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2006 The Regents of The University of Michigan
15 * Copyright (c) 2010,2015 Advanced Micro Devices, Inc.
16 * All rights reserved.
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are
20 * met: redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer;
22 * redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution;
25 * neither the name of the copyright holders nor the names of its
26 * contributors may be used to endorse or promote products derived from
27 * this software without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 *
41 * Authors: Ali Saidi
42 *          Steve Reinhardt
43 */
44
45/**
46 * @file
47 * Definition of the Packet Class, a packet is a transaction occuring
48 * between a single level of the memory heirarchy (ie L1->L2).
49 */
50
51#include "mem/packet.hh"
52
53#include <algorithm>
54#include <cstring>
55#include <iostream>
56
57#include "base/cprintf.hh"
58#include "base/logging.hh"
59#include "base/trace.hh"
60#include "mem/packet_access.hh"
61
62using namespace std;
63
64// The one downside to bitsets is that static initializers can get ugly.
65#define SET1(a1)                     (1 << (a1))
66#define SET2(a1, a2)                 (SET1(a1) | SET1(a2))
67#define SET3(a1, a2, a3)             (SET2(a1, a2) | SET1(a3))
68#define SET4(a1, a2, a3, a4)         (SET3(a1, a2, a3) | SET1(a4))
69#define SET5(a1, a2, a3, a4, a5)     (SET4(a1, a2, a3, a4) | SET1(a5))
70#define SET6(a1, a2, a3, a4, a5, a6) (SET5(a1, a2, a3, a4, a5) | SET1(a6))
71#define SET7(a1, a2, a3, a4, a5, a6, a7) (SET6(a1, a2, a3, a4, a5, a6) | \
72                                          SET1(a7))
73
74const MemCmd::CommandInfo
75MemCmd::commandInfo[] =
76{
77    /* InvalidCmd */
78    { 0, InvalidCmd, "InvalidCmd" },
79    /* ReadReq - Read issued by a non-caching agent such as a CPU or
80     * device, with no restrictions on alignment. */
81    { SET3(IsRead, IsRequest, NeedsResponse), ReadResp, "ReadReq" },
82    /* ReadResp */
83    { SET3(IsRead, IsResponse, HasData), InvalidCmd, "ReadResp" },
84    /* ReadRespWithInvalidate */
85    { SET4(IsRead, IsResponse, HasData, IsInvalidate),
86            InvalidCmd, "ReadRespWithInvalidate" },
87    /* WriteReq */
88    { SET5(IsWrite, NeedsWritable, IsRequest, NeedsResponse, HasData),
89            WriteResp, "WriteReq" },
90    /* WriteResp */
91    { SET2(IsWrite, IsResponse), InvalidCmd, "WriteResp" },
92    /* WritebackDirty */
93    { SET5(IsWrite, IsRequest, IsEviction, HasData, FromCache),
94            InvalidCmd, "WritebackDirty" },
95    /* WritebackClean - This allows the upstream cache to writeback a
96     * line to the downstream cache without it being considered
97     * dirty. */
98    { SET5(IsWrite, IsRequest, IsEviction, HasData, FromCache),
99            InvalidCmd, "WritebackClean" },
100    /* WriteClean - This allows a cache to write a dirty block to a memory
101       below without evicting its copy. */
102    { SET4(IsWrite, IsRequest, HasData, FromCache), InvalidCmd, "WriteClean" },
103    /* CleanEvict */
104    { SET3(IsRequest, IsEviction, FromCache), InvalidCmd, "CleanEvict" },
105    /* SoftPFReq */
106    { SET4(IsRead, IsRequest, IsSWPrefetch, NeedsResponse),
107            SoftPFResp, "SoftPFReq" },
108    /* HardPFReq */
109    { SET5(IsRead, IsRequest, IsHWPrefetch, NeedsResponse, FromCache),
110            HardPFResp, "HardPFReq" },
111    /* SoftPFResp */
112    { SET4(IsRead, IsResponse, IsSWPrefetch, HasData),
113            InvalidCmd, "SoftPFResp" },
114    /* HardPFResp */
115    { SET4(IsRead, IsResponse, IsHWPrefetch, HasData),
116            InvalidCmd, "HardPFResp" },
117    /* WriteLineReq */
118    { SET5(IsWrite, NeedsWritable, IsRequest, NeedsResponse, HasData),
119            WriteResp, "WriteLineReq" },
120    /* UpgradeReq */
121    { SET6(IsInvalidate, NeedsWritable, IsUpgrade, IsRequest, NeedsResponse,
122            FromCache),
123            UpgradeResp, "UpgradeReq" },
124    /* SCUpgradeReq: response could be UpgradeResp or UpgradeFailResp */
125    { SET7(IsInvalidate, NeedsWritable, IsUpgrade, IsLlsc,
126           IsRequest, NeedsResponse, FromCache),
127            UpgradeResp, "SCUpgradeReq" },
128    /* UpgradeResp */
129    { SET2(IsUpgrade, IsResponse),
130            InvalidCmd, "UpgradeResp" },
131    /* SCUpgradeFailReq: generates UpgradeFailResp but still gets the data */
132    { SET7(IsRead, NeedsWritable, IsInvalidate,
133           IsLlsc, IsRequest, NeedsResponse, FromCache),
134            UpgradeFailResp, "SCUpgradeFailReq" },
135    /* UpgradeFailResp - Behaves like a ReadExReq, but notifies an SC
136     * that it has failed, acquires line as Dirty*/
137    { SET3(IsRead, IsResponse, HasData),
138            InvalidCmd, "UpgradeFailResp" },
139    /* ReadExReq - Read issues by a cache, always cache-line aligned,
140     * and the response is guaranteed to be writeable (exclusive or
141     * even modified) */
142    { SET6(IsRead, NeedsWritable, IsInvalidate, IsRequest, NeedsResponse,
143            FromCache),
144            ReadExResp, "ReadExReq" },
145    /* ReadExResp - Response matching a read exclusive, as we check
146     * the need for exclusive also on responses */
147    { SET3(IsRead, IsResponse, HasData),
148            InvalidCmd, "ReadExResp" },
149    /* ReadCleanReq - Read issued by a cache, always cache-line
150     * aligned, and the response is guaranteed to not contain dirty data
151     * (exclusive or shared).*/
152    { SET4(IsRead, IsRequest, NeedsResponse, FromCache),
153            ReadResp, "ReadCleanReq" },
154    /* ReadSharedReq - Read issued by a cache, always cache-line
155     * aligned, response is shared, possibly exclusive, owned or even
156     * modified. */
157    { SET4(IsRead, IsRequest, NeedsResponse, FromCache),
158            ReadResp, "ReadSharedReq" },
159    /* LoadLockedReq: note that we use plain ReadResp as response, so that
160     *                we can also use ReadRespWithInvalidate when needed */
161    { SET4(IsRead, IsLlsc, IsRequest, NeedsResponse),
162            ReadResp, "LoadLockedReq" },
163    /* StoreCondReq */
164    { SET6(IsWrite, NeedsWritable, IsLlsc,
165           IsRequest, NeedsResponse, HasData),
166            StoreCondResp, "StoreCondReq" },
167    /* StoreCondFailReq: generates failing StoreCondResp */
168    { SET6(IsWrite, NeedsWritable, IsLlsc,
169           IsRequest, NeedsResponse, HasData),
170            StoreCondResp, "StoreCondFailReq" },
171    /* StoreCondResp */
172    { SET3(IsWrite, IsLlsc, IsResponse),
173            InvalidCmd, "StoreCondResp" },
174    /* SwapReq -- for Swap ldstub type operations */
175    { SET6(IsRead, IsWrite, NeedsWritable, IsRequest, HasData, NeedsResponse),
176        SwapResp, "SwapReq" },
177    /* SwapResp -- for Swap ldstub type operations */
178    { SET4(IsRead, IsWrite, IsResponse, HasData),
179            InvalidCmd, "SwapResp" },
180    /* IntReq -- for interrupts */
181    { SET4(IsWrite, IsRequest, NeedsResponse, HasData),
182        MessageResp, "MessageReq" },
183    /* IntResp -- for interrupts */
184    { SET2(IsWrite, IsResponse), InvalidCmd, "MessageResp" },
185    /* MemFenceReq -- for synchronization requests */
186    {SET2(IsRequest, NeedsResponse), MemFenceResp, "MemFenceReq"},
187    /* MemFenceResp -- for synchronization responses */
188    {SET1(IsResponse), InvalidCmd, "MemFenceResp"},
189    /* Cache Clean Request -- Update with the latest data all existing
190       copies of the block down to the point indicated by the
191       request */
192    { SET4(IsRequest, IsClean, NeedsResponse, FromCache),
193      CleanSharedResp, "CleanSharedReq" },
194    /* Cache Clean Response - Indicates that all caches up to the
195       specified point of reference have a up-to-date copy of the
196       cache block or no copy at all */
197    { SET2(IsResponse, IsClean), InvalidCmd, "CleanSharedResp" },
198    /* Cache Clean and Invalidate Request -- Invalidate all existing
199       copies down to the point indicated by the request */
200    { SET5(IsRequest, IsInvalidate, IsClean, NeedsResponse, FromCache),
201      CleanInvalidResp, "CleanInvalidReq" },
202     /* Cache Clean and Invalidate Respose -- Indicates that no cache
203        above the specified point holds the block and that the block
204        was written to a memory below the specified point. */
205    { SET3(IsResponse, IsInvalidate, IsClean),
206      InvalidCmd, "CleanInvalidResp" },
207    /* InvalidDestError  -- packet dest field invalid */
208    { SET2(IsResponse, IsError), InvalidCmd, "InvalidDestError" },
209    /* BadAddressError   -- memory address invalid */
210    { SET2(IsResponse, IsError), InvalidCmd, "BadAddressError" },
211    /* FunctionalReadError */
212    { SET3(IsRead, IsResponse, IsError), InvalidCmd, "FunctionalReadError" },
213    /* FunctionalWriteError */
214    { SET3(IsWrite, IsResponse, IsError), InvalidCmd, "FunctionalWriteError" },
215    /* PrintReq */
216    { SET2(IsRequest, IsPrint), InvalidCmd, "PrintReq" },
217    /* Flush Request */
218    { SET3(IsRequest, IsFlush, NeedsWritable), InvalidCmd, "FlushReq" },
219    /* Invalidation Request */
220    { SET5(IsInvalidate, IsRequest, NeedsWritable, NeedsResponse, FromCache),
221      InvalidateResp, "InvalidateReq" },
222    /* Invalidation Response */
223    { SET2(IsInvalidate, IsResponse),
224      InvalidCmd, "InvalidateResp" }
225};
226
227bool
228Packet::checkFunctional(Printable *obj, Addr addr, bool is_secure, int size,
229                        uint8_t *_data)
230{
231    const Addr func_start = getAddr();
232    const Addr func_end   = getAddr() + getSize() - 1;
233    const Addr val_start  = addr;
234    const Addr val_end    = val_start + size - 1;
235
236    if (is_secure != _isSecure || func_start > val_end ||
237        val_start > func_end) {
238        // no intersection
239        return false;
240    }
241
242    // check print first since it doesn't require data
243    if (isPrint()) {
244        assert(!_data);
245        safe_cast<PrintReqState*>(senderState)->printObj(obj);
246        return false;
247    }
248
249    // we allow the caller to pass NULL to signify the other packet
250    // has no data
251    if (!_data) {
252        return false;
253    }
254
255    const Addr val_offset = func_start > val_start ?
256        func_start - val_start : 0;
257    const Addr func_offset = func_start < val_start ?
258        val_start - func_start : 0;
259    const Addr overlap_size = std::min(val_end, func_end)+1 -
260        std::max(val_start, func_start);
261
262    if (isRead()) {
263        memcpy(getPtr<uint8_t>() + func_offset,
264               _data + val_offset,
265               overlap_size);
266
267        // initialise the tracking of valid bytes if we have not
268        // used it already
269        if (bytesValid.empty())
270            bytesValid.resize(getSize(), false);
271
272        // track if we are done filling the functional access
273        bool all_bytes_valid = true;
274
275        int i = 0;
276
277        // check up to func_offset
278        for (; all_bytes_valid && i < func_offset; ++i)
279            all_bytes_valid &= bytesValid[i];
280
281        // update the valid bytes
282        for (i = func_offset; i < func_offset + overlap_size; ++i)
283            bytesValid[i] = true;
284
285        // check the bit after the update we just made
286        for (; all_bytes_valid && i < getSize(); ++i)
287            all_bytes_valid &= bytesValid[i];
288
289        return all_bytes_valid;
290    } else if (isWrite()) {
291        memcpy(_data + val_offset,
292               getConstPtr<uint8_t>() + func_offset,
293               overlap_size);
294    } else {
295        panic("Don't know how to handle command %s\n", cmdString());
296    }
297
298    // keep going with request by default
299    return false;
300}
301
302void
303Packet::pushSenderState(Packet::SenderState *sender_state)
304{
305    assert(sender_state != NULL);
306    sender_state->predecessor = senderState;
307    senderState = sender_state;
308}
309
310Packet::SenderState *
311Packet::popSenderState()
312{
313    assert(senderState != NULL);
314    SenderState *sender_state = senderState;
315    senderState = sender_state->predecessor;
316    sender_state->predecessor = NULL;
317    return sender_state;
318}
319
320uint64_t
321Packet::getUintX(ByteOrder endian) const
322{
323    switch(getSize()) {
324      case 1:
325        return (uint64_t)get<uint8_t>(endian);
326      case 2:
327        return (uint64_t)get<uint16_t>(endian);
328      case 4:
329        return (uint64_t)get<uint32_t>(endian);
330      case 8:
331        return (uint64_t)get<uint64_t>(endian);
332      default:
333        panic("%i isn't a supported word size.\n", getSize());
334    }
335}
336
337void
338Packet::setUintX(uint64_t w, ByteOrder endian)
339{
340    switch(getSize()) {
341      case 1:
342        set<uint8_t>((uint8_t)w, endian);
343        break;
344      case 2:
345        set<uint16_t>((uint16_t)w, endian);
346        break;
347      case 4:
348        set<uint32_t>((uint32_t)w, endian);
349        break;
350      case 8:
351        set<uint64_t>((uint64_t)w, endian);
352        break;
353      default:
354        panic("%i isn't a supported word size.\n", getSize());
355    }
356
357}
358
359void
360Packet::print(ostream &o, const int verbosity, const string &prefix) const
361{
362    ccprintf(o, "%s%s [%x:%x]%s%s%s%s%s%s", prefix, cmdString(),
363             getAddr(), getAddr() + getSize() - 1,
364             req->isSecure() ? " (s)" : "",
365             req->isInstFetch() ? " IF" : "",
366             req->isUncacheable() ? " UC" : "",
367             isExpressSnoop() ? " ES" : "",
368             req->isToPOC() ? " PoC" : "",
369             req->isToPOU() ? " PoU" : "");
370}
371
372std::string
373Packet::print() const {
374    ostringstream str;
375    print(str);
376    return str.str();
377}
378
379Packet::PrintReqState::PrintReqState(ostream &_os, int _verbosity)
380    : curPrefixPtr(new string("")), os(_os), verbosity(_verbosity)
381{
382    labelStack.push_back(LabelStackEntry("", curPrefixPtr));
383}
384
385Packet::PrintReqState::~PrintReqState()
386{
387    labelStack.pop_back();
388    assert(labelStack.empty());
389    delete curPrefixPtr;
390}
391
392Packet::PrintReqState::
393LabelStackEntry::LabelStackEntry(const string &_label, string *_prefix)
394    : label(_label), prefix(_prefix), labelPrinted(false)
395{
396}
397
398void
399Packet::PrintReqState::pushLabel(const string &lbl, const string &prefix)
400{
401    labelStack.push_back(LabelStackEntry(lbl, curPrefixPtr));
402    curPrefixPtr = new string(*curPrefixPtr);
403    *curPrefixPtr += prefix;
404}
405
406void
407Packet::PrintReqState::popLabel()
408{
409    delete curPrefixPtr;
410    curPrefixPtr = labelStack.back().prefix;
411    labelStack.pop_back();
412    assert(!labelStack.empty());
413}
414
415void
416Packet::PrintReqState::printLabels()
417{
418    if (!labelStack.back().labelPrinted) {
419        LabelStack::iterator i = labelStack.begin();
420        LabelStack::iterator end = labelStack.end();
421        while (i != end) {
422            if (!i->labelPrinted) {
423                ccprintf(os, "%s%s\n", *(i->prefix), i->label);
424                i->labelPrinted = true;
425            }
426            i++;
427        }
428    }
429}
430
431
432void
433Packet::PrintReqState::printObj(Printable *obj)
434{
435    printLabels();
436    obj->print(os, verbosity, curPrefix());
437}
438