packet.cc revision 8184
12686Sksewell@umich.edu/* 22686Sksewell@umich.edu * Copyright (c) 2006 The Regents of The University of Michigan 32754Sksewell@umich.edu * Copyright (c) 2010 Advanced Micro Devices, Inc. 42706Sksewell@umich.edu * All rights reserved. 52706Sksewell@umich.edu * 62706Sksewell@umich.edu * Redistribution and use in source and binary forms, with or without 72706Sksewell@umich.edu * modification, are permitted provided that the following conditions are 82706Sksewell@umich.edu * met: redistributions of source code must retain the above copyright 92706Sksewell@umich.edu * notice, this list of conditions and the following disclaimer; 102706Sksewell@umich.edu * redistributions in binary form must reproduce the above copyright 112706Sksewell@umich.edu * notice, this list of conditions and the following disclaimer in the 122706Sksewell@umich.edu * documentation and/or other materials provided with the distribution; 132706Sksewell@umich.edu * neither the name of the copyright holders nor the names of its 142706Sksewell@umich.edu * contributors may be used to endorse or promote products derived from 152706Sksewell@umich.edu * this software without specific prior written permission. 162706Sksewell@umich.edu * 172706Sksewell@umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 182706Sksewell@umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 192706Sksewell@umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 202706Sksewell@umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 212706Sksewell@umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 222706Sksewell@umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 232706Sksewell@umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 242706Sksewell@umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 252706Sksewell@umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 262706Sksewell@umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 272706Sksewell@umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 282706Sksewell@umich.edu * 292706Sksewell@umich.edu * Authors: Ali Saidi 302706Sksewell@umich.edu * Steve Reinhardt 312022SN/A */ 322022SN/A 332022SN/A/** 342022SN/A * @file 352022SN/A * Definition of the Packet Class, a packet is a transaction occuring 362022SN/A * between a single level of the memory heirarchy (ie L1->L2). 372022SN/A */ 382022SN/A 392022SN/A#include <iostream> 402028SN/A#include <cstring> 412022SN/A#include "base/cprintf.hh" 422022SN/A#include "base/misc.hh" 432022SN/A#include "base/trace.hh" 442022SN/A#include "mem/packet.hh" 452028SN/A 462022SN/Ausing namespace std; 472022SN/A 482022SN/A// The one downside to bitsets is that static initializers can get ugly. 492022SN/A#define SET1(a1) (1 << (a1)) 502022SN/A#define SET2(a1, a2) (SET1(a1) | SET1(a2)) 512022SN/A#define SET3(a1, a2, a3) (SET2(a1, a2) | SET1(a3)) 522022SN/A#define SET4(a1, a2, a3, a4) (SET3(a1, a2, a3) | SET1(a4)) 532022SN/A#define SET5(a1, a2, a3, a4, a5) (SET4(a1, a2, a3, a4) | SET1(a5)) 542022SN/A#define SET6(a1, a2, a3, a4, a5, a6) (SET5(a1, a2, a3, a4, a5) | SET1(a6)) 552022SN/A 562686Sksewell@umich.educonst MemCmd::CommandInfo 572022SN/AMemCmd::commandInfo[] = 582022SN/A{ 592022SN/A /* InvalidCmd */ 602022SN/A { 0, InvalidCmd, "InvalidCmd" }, 612686Sksewell@umich.edu /* ReadReq */ 622022SN/A { SET3(IsRead, IsRequest, NeedsResponse), ReadResp, "ReadReq" }, 632022SN/A /* ReadResp */ 642022SN/A { SET3(IsRead, IsResponse, HasData), InvalidCmd, "ReadResp" }, 652022SN/A /* ReadRespWithInvalidate */ 662022SN/A { SET4(IsRead, IsResponse, HasData, IsInvalidate), 672686Sksewell@umich.edu InvalidCmd, "ReadRespWithInvalidate" }, 682022SN/A /* WriteReq */ 692022SN/A { SET5(IsWrite, NeedsExclusive, IsRequest, NeedsResponse, HasData), 702022SN/A WriteResp, "WriteReq" }, 712022SN/A /* WriteResp */ 722239SN/A { SET3(IsWrite, NeedsExclusive, IsResponse), InvalidCmd, "WriteResp" }, 732751Sksewell@umich.edu /* Writeback */ 742751Sksewell@umich.edu { SET4(IsWrite, NeedsExclusive, IsRequest, HasData), 752751Sksewell@umich.edu InvalidCmd, "Writeback" }, 763951Sgblack@eecs.umich.edu /* SoftPFReq */ 772022SN/A { SET4(IsRead, IsRequest, IsSWPrefetch, NeedsResponse), 782022SN/A SoftPFResp, "SoftPFReq" }, 792239SN/A /* HardPFReq */ 802239SN/A { SET4(IsRead, IsRequest, IsHWPrefetch, NeedsResponse), 812022SN/A HardPFResp, "HardPFReq" }, 82 /* SoftPFResp */ 83 { SET4(IsRead, IsResponse, IsSWPrefetch, HasData), 84 InvalidCmd, "SoftPFResp" }, 85 /* HardPFResp */ 86 { SET4(IsRead, IsResponse, IsHWPrefetch, HasData), 87 InvalidCmd, "HardPFResp" }, 88 /* WriteInvalidateReq */ 89 { SET6(IsWrite, NeedsExclusive, IsInvalidate, 90 IsRequest, HasData, NeedsResponse), 91 WriteInvalidateResp, "WriteInvalidateReq" }, 92 /* WriteInvalidateResp */ 93 { SET3(IsWrite, NeedsExclusive, IsResponse), 94 InvalidCmd, "WriteInvalidateResp" }, 95 /* UpgradeReq */ 96 { SET5(IsInvalidate, NeedsExclusive, IsUpgrade, IsRequest, NeedsResponse), 97 UpgradeResp, "UpgradeReq" }, 98 /* SCUpgradeReq: response could be UpgradeResp or UpgradeFailResp */ 99 { SET6(IsInvalidate, NeedsExclusive, IsUpgrade, IsLlsc, 100 IsRequest, NeedsResponse), 101 UpgradeResp, "SCUpgradeReq" }, 102 /* UpgradeResp */ 103 { SET3(NeedsExclusive, IsUpgrade, IsResponse), 104 InvalidCmd, "UpgradeResp" }, 105 /* SCUpgradeFailReq: generates UpgradeFailResp ASAP */ 106 { SET5(IsInvalidate, NeedsExclusive, IsLlsc, 107 IsRequest, NeedsResponse), 108 UpgradeFailResp, "SCUpgradeFailReq" }, 109 /* UpgradeFailResp */ 110 { SET2(NeedsExclusive, IsResponse), 111 InvalidCmd, "UpgradeFailResp" }, 112 /* ReadExReq */ 113 { SET5(IsRead, NeedsExclusive, IsInvalidate, IsRequest, NeedsResponse), 114 ReadExResp, "ReadExReq" }, 115 /* ReadExResp */ 116 { SET4(IsRead, NeedsExclusive, IsResponse, HasData), 117 InvalidCmd, "ReadExResp" }, 118 /* LoadLockedReq: note that we use plain ReadResp as response, so that 119 * we can also use ReadRespWithInvalidate when needed */ 120 { SET4(IsRead, IsLlsc, IsRequest, NeedsResponse), 121 ReadResp, "LoadLockedReq" }, 122 /* StoreCondReq */ 123 { SET6(IsWrite, NeedsExclusive, IsLlsc, 124 IsRequest, NeedsResponse, HasData), 125 StoreCondResp, "StoreCondReq" }, 126 /* StoreCondFailReq: generates failing StoreCondResp ASAP */ 127 { SET6(IsWrite, NeedsExclusive, IsLlsc, 128 IsRequest, NeedsResponse, HasData), 129 StoreCondResp, "StoreCondFailReq" }, 130 /* StoreCondResp */ 131 { SET4(IsWrite, NeedsExclusive, IsLlsc, IsResponse), 132 InvalidCmd, "StoreCondResp" }, 133 /* SwapReq -- for Swap ldstub type operations */ 134 { SET6(IsRead, IsWrite, NeedsExclusive, IsRequest, HasData, NeedsResponse), 135 SwapResp, "SwapReq" }, 136 /* SwapResp -- for Swap ldstub type operations */ 137 { SET5(IsRead, IsWrite, NeedsExclusive, IsResponse, HasData), 138 InvalidCmd, "SwapResp" }, 139 /* IntReq -- for interrupts */ 140 { SET4(IsWrite, IsRequest, NeedsResponse, HasData), 141 MessageResp, "MessageReq" }, 142 /* IntResp -- for interrupts */ 143 { SET2(IsWrite, IsResponse), InvalidCmd, "MessageResp" }, 144 /* NetworkNackError -- nacked at network layer (not by protocol) */ 145 { SET2(IsResponse, IsError), InvalidCmd, "NetworkNackError" }, 146 /* InvalidDestError -- packet dest field invalid */ 147 { SET2(IsResponse, IsError), InvalidCmd, "InvalidDestError" }, 148 /* BadAddressError -- memory address invalid */ 149 { SET2(IsResponse, IsError), InvalidCmd, "BadAddressError" }, 150 /* PrintReq */ 151 { SET2(IsRequest, IsPrint), InvalidCmd, "PrintReq" }, 152 /* Flush Request */ 153 { SET3(IsRequest, IsFlush, NeedsExclusive), InvalidCmd, "FlushReq" } 154}; 155 156bool 157Packet::checkFunctional(Printable *obj, Addr addr, int size, uint8_t *data) 158{ 159 Addr func_start = getAddr(); 160 Addr func_end = getAddr() + getSize() - 1; 161 Addr val_start = addr; 162 Addr val_end = val_start + size - 1; 163 164 if (func_start > val_end || val_start > func_end) { 165 // no intersection 166 return false; 167 } 168 169 // check print first since it doesn't require data 170 if (isPrint()) { 171 dynamic_cast<PrintReqState*>(senderState)->printObj(obj); 172 return false; 173 } 174 175 // if there's no data, there's no need to look further 176 if (!data) { 177 return false; 178 } 179 180 // offset of functional request into supplied value (could be 181 // negative if partial overlap) 182 int offset = func_start - val_start; 183 184 if (isRead()) { 185 if (func_start >= val_start && func_end <= val_end) { 186 allocate(); 187 memcpy(getPtr<uint8_t>(), data + offset, getSize()); 188 return true; 189 } else { 190 // In this case the timing packet only partially satisfies 191 // the request, so we would need more information to make 192 // this work. Like bytes valid in the packet or 193 // something, so the request could continue and get this 194 // bit of possibly newer data along with the older data 195 // not written to yet. 196 panic("Memory value only partially satisfies the functional " 197 "request. Now what?"); 198 } 199 } else if (isWrite()) { 200 if (offset >= 0) { 201 memcpy(data + offset, getPtr<uint8_t>(), 202 (min(func_end, val_end) - func_start) + 1); 203 } else { 204 // val_start > func_start 205 memcpy(data, getPtr<uint8_t>() - offset, 206 (min(func_end, val_end) - val_start) + 1); 207 } 208 } else { 209 panic("Don't know how to handle command %s\n", cmdString()); 210 } 211 212 // keep going with request by default 213 return false; 214} 215 216void 217Packet::print(ostream &o, const int verbosity, const string &prefix) const 218{ 219 ccprintf(o, "%s[%x:%x] %s\n", prefix, 220 getAddr(), getAddr() + getSize() - 1, cmdString()); 221} 222 223Packet::PrintReqState::PrintReqState(ostream &_os, int _verbosity) 224 : curPrefixPtr(new string("")), os(_os), verbosity(_verbosity) 225{ 226 labelStack.push_back(LabelStackEntry("", curPrefixPtr)); 227} 228 229Packet::PrintReqState::~PrintReqState() 230{ 231 labelStack.pop_back(); 232 assert(labelStack.empty()); 233 delete curPrefixPtr; 234} 235 236Packet::PrintReqState:: 237LabelStackEntry::LabelStackEntry(const string &_label, string *_prefix) 238 : label(_label), prefix(_prefix), labelPrinted(false) 239{ 240} 241 242void 243Packet::PrintReqState::pushLabel(const string &lbl, const string &prefix) 244{ 245 labelStack.push_back(LabelStackEntry(lbl, curPrefixPtr)); 246 curPrefixPtr = new string(*curPrefixPtr); 247 *curPrefixPtr += prefix; 248} 249 250void 251Packet::PrintReqState::popLabel() 252{ 253 delete curPrefixPtr; 254 curPrefixPtr = labelStack.back().prefix; 255 labelStack.pop_back(); 256 assert(!labelStack.empty()); 257} 258 259void 260Packet::PrintReqState::printLabels() 261{ 262 if (!labelStack.back().labelPrinted) { 263 LabelStack::iterator i = labelStack.begin(); 264 LabelStack::iterator end = labelStack.end(); 265 while (i != end) { 266 if (!i->labelPrinted) { 267 ccprintf(os, "%s%s\n", *(i->prefix), i->label); 268 i->labelPrinted = true; 269 } 270 i++; 271 } 272 } 273} 274 275 276void 277Packet::PrintReqState::printObj(Printable *obj) 278{ 279 printLabels(); 280 obj->print(os, verbosity, curPrefix()); 281} 282