packet.cc revision 4870
12568SN/A/*
22568SN/A * Copyright (c) 2006 The Regents of The University of Michigan
32568SN/A * All rights reserved.
42568SN/A *
52568SN/A * Redistribution and use in source and binary forms, with or without
62568SN/A * modification, are permitted provided that the following conditions are
72568SN/A * met: redistributions of source code must retain the above copyright
82568SN/A * notice, this list of conditions and the following disclaimer;
92568SN/A * redistributions in binary form must reproduce the above copyright
102568SN/A * notice, this list of conditions and the following disclaimer in the
112568SN/A * documentation and/or other materials provided with the distribution;
122568SN/A * neither the name of the copyright holders nor the names of its
132568SN/A * contributors may be used to endorse or promote products derived from
142568SN/A * this software without specific prior written permission.
152568SN/A *
162568SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
172568SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
182568SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
192568SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
202568SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
212568SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
222568SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
232568SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
242568SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
252568SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
262568SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272665Ssaidi@eecs.umich.edu *
282665Ssaidi@eecs.umich.edu * Authors: Ali Saidi
292665Ssaidi@eecs.umich.edu *          Steve Reinhardt
302568SN/A */
312568SN/A
322568SN/A/**
332568SN/A * @file
342568SN/A * Definition of the Packet Class, a packet is a transaction occuring
352568SN/A * between a single level of the memory heirarchy (ie L1->L2).
362568SN/A */
373260Ssaidi@eecs.umich.edu
383260Ssaidi@eecs.umich.edu#include <iostream>
393918Ssaidi@eecs.umich.edu#include <cstring>
402590SN/A#include "base/misc.hh"
413348Sbinkertn@umich.edu#include "base/trace.hh"
422568SN/A#include "mem/packet.hh"
432568SN/A
444022Sstever@eecs.umich.edu// The one downside to bitsets is that static initializers can get ugly.
454022Sstever@eecs.umich.edu#define SET1(a1)                     (1 << (a1))
464022Sstever@eecs.umich.edu#define SET2(a1, a2)                 (SET1(a1) | SET1(a2))
474022Sstever@eecs.umich.edu#define SET3(a1, a2, a3)             (SET2(a1, a2) | SET1(a3))
484022Sstever@eecs.umich.edu#define SET4(a1, a2, a3, a4)         (SET3(a1, a2, a3) | SET1(a4))
494022Sstever@eecs.umich.edu#define SET5(a1, a2, a3, a4, a5)     (SET4(a1, a2, a3, a4) | SET1(a5))
504022Sstever@eecs.umich.edu#define SET6(a1, a2, a3, a4, a5, a6) (SET5(a1, a2, a3, a4, a5) | SET1(a6))
512641Sstever@eecs.umich.edu
524022Sstever@eecs.umich.educonst MemCmd::CommandInfo
534022Sstever@eecs.umich.eduMemCmd::commandInfo[] =
542641Sstever@eecs.umich.edu{
554022Sstever@eecs.umich.edu    /* InvalidCmd */
564022Sstever@eecs.umich.edu    { 0, InvalidCmd, "InvalidCmd" },
574022Sstever@eecs.umich.edu    /* ReadReq */
584022Sstever@eecs.umich.edu    { SET3(IsRead, IsRequest, NeedsResponse), ReadResp, "ReadReq" },
594473Sstever@eecs.umich.edu    /* ReadResp */
604473Sstever@eecs.umich.edu    { SET3(IsRead, IsResponse, HasData), InvalidCmd, "ReadResp" },
614022Sstever@eecs.umich.edu    /* WriteReq */
624626Sstever@eecs.umich.edu    { SET5(IsWrite, NeedsExclusive, IsRequest, NeedsResponse, HasData),
634022Sstever@eecs.umich.edu            WriteResp, "WriteReq" },
644022Sstever@eecs.umich.edu    /* WriteResp */
654626Sstever@eecs.umich.edu    { SET3(IsWrite, NeedsExclusive, IsResponse), InvalidCmd, "WriteResp" },
664022Sstever@eecs.umich.edu    /* Writeback */
674628Sstever@eecs.umich.edu    { SET4(IsWrite, NeedsExclusive, IsRequest, HasData),
684628Sstever@eecs.umich.edu            InvalidCmd, "Writeback" },
694022Sstever@eecs.umich.edu    /* SoftPFReq */
704022Sstever@eecs.umich.edu    { SET4(IsRead, IsRequest, IsSWPrefetch, NeedsResponse),
714022Sstever@eecs.umich.edu            SoftPFResp, "SoftPFReq" },
724022Sstever@eecs.umich.edu    /* HardPFReq */
734022Sstever@eecs.umich.edu    { SET4(IsRead, IsRequest, IsHWPrefetch, NeedsResponse),
744022Sstever@eecs.umich.edu            HardPFResp, "HardPFReq" },
754022Sstever@eecs.umich.edu    /* SoftPFResp */
764022Sstever@eecs.umich.edu    { SET4(IsRead, IsResponse, IsSWPrefetch, HasData),
774022Sstever@eecs.umich.edu            InvalidCmd, "SoftPFResp" },
784022Sstever@eecs.umich.edu    /* HardPFResp */
794022Sstever@eecs.umich.edu    { SET4(IsRead, IsResponse, IsHWPrefetch, HasData),
804022Sstever@eecs.umich.edu            InvalidCmd, "HardPFResp" },
814022Sstever@eecs.umich.edu    /* WriteInvalidateReq */
824626Sstever@eecs.umich.edu    { SET6(IsWrite, NeedsExclusive, IsInvalidate,
834626Sstever@eecs.umich.edu           IsRequest, HasData, NeedsResponse),
844022Sstever@eecs.umich.edu            WriteInvalidateResp, "WriteInvalidateReq" },
854022Sstever@eecs.umich.edu    /* WriteInvalidateResp */
864626Sstever@eecs.umich.edu    { SET4(IsWrite, NeedsExclusive, IsInvalidate, IsResponse),
874022Sstever@eecs.umich.edu            InvalidCmd, "WriteInvalidateResp" },
884022Sstever@eecs.umich.edu    /* UpgradeReq */
894628Sstever@eecs.umich.edu    { SET4(IsInvalidate, NeedsExclusive, IsRequest, NeedsResponse),
904628Sstever@eecs.umich.edu            UpgradeResp, "UpgradeReq" },
914628Sstever@eecs.umich.edu    /* UpgradeResp */
924628Sstever@eecs.umich.edu    { SET3(IsInvalidate, NeedsExclusive, IsResponse),
934628Sstever@eecs.umich.edu            InvalidCmd, "UpgradeResp" },
944022Sstever@eecs.umich.edu    /* ReadExReq */
954626Sstever@eecs.umich.edu    { SET5(IsRead, NeedsExclusive, IsInvalidate, IsRequest, NeedsResponse),
964022Sstever@eecs.umich.edu            ReadExResp, "ReadExReq" },
974022Sstever@eecs.umich.edu    /* ReadExResp */
984626Sstever@eecs.umich.edu    { SET5(IsRead, NeedsExclusive, IsInvalidate, IsResponse, HasData),
994040Ssaidi@eecs.umich.edu            InvalidCmd, "ReadExResp" },
1004626Sstever@eecs.umich.edu    /* LoadLockedReq */
1014626Sstever@eecs.umich.edu    { SET4(IsRead, IsLocked, IsRequest, NeedsResponse),
1024626Sstever@eecs.umich.edu            ReadResp, "LoadLockedReq" },
1034626Sstever@eecs.umich.edu    /* LoadLockedResp */
1044626Sstever@eecs.umich.edu    { SET4(IsRead, IsLocked, IsResponse, HasData),
1054626Sstever@eecs.umich.edu            InvalidCmd, "LoadLockedResp" },
1064626Sstever@eecs.umich.edu    /* StoreCondReq */
1074626Sstever@eecs.umich.edu    { SET6(IsWrite, NeedsExclusive, IsLocked,
1084626Sstever@eecs.umich.edu           IsRequest, NeedsResponse, HasData),
1094626Sstever@eecs.umich.edu            StoreCondResp, "StoreCondReq" },
1104626Sstever@eecs.umich.edu    /* StoreCondResp */
1114626Sstever@eecs.umich.edu    { SET4(IsWrite, NeedsExclusive, IsLocked, IsResponse),
1124626Sstever@eecs.umich.edu            InvalidCmd, "StoreCondResp" },
1134040Ssaidi@eecs.umich.edu    /* SwapReq -- for Swap ldstub type operations */
1144626Sstever@eecs.umich.edu    { SET6(IsRead, IsWrite, NeedsExclusive, IsRequest, HasData, NeedsResponse),
1154040Ssaidi@eecs.umich.edu        SwapResp, "SwapReq" },
1164040Ssaidi@eecs.umich.edu    /* SwapResp -- for Swap ldstub type operations */
1174626Sstever@eecs.umich.edu    { SET5(IsRead, IsWrite, NeedsExclusive, IsResponse, HasData),
1184870Sstever@eecs.umich.edu            InvalidCmd, "SwapResp" },
1194870Sstever@eecs.umich.edu    /* NetworkNackError  -- nacked at network layer (not by protocol) */
1204870Sstever@eecs.umich.edu    { SET2(IsRequest, IsError), InvalidCmd, "NetworkNackError" },
1214870Sstever@eecs.umich.edu    /* InvalidDestError  -- packet dest field invalid */
1224870Sstever@eecs.umich.edu    { SET2(IsRequest, IsError), InvalidCmd, "InvalidDestError" },
1234870Sstever@eecs.umich.edu    /* BadAddressError   -- memory address invalid */
1244870Sstever@eecs.umich.edu    { SET2(IsRequest, IsError), InvalidCmd, "BadAddressError" }
1254022Sstever@eecs.umich.edu};
1262592SN/A
1272811Srdreslin@umich.edu
1282592SN/A/** delete the data pointed to in the data pointer. Ok to call to matter how
1292592SN/A * data was allocted. */
1302592SN/Avoid
1312641Sstever@eecs.umich.eduPacket::deleteData()
1322641Sstever@eecs.umich.edu{
1332592SN/A    assert(staticData || dynamicData);
1342592SN/A    if (staticData)
1352592SN/A        return;
1362592SN/A
1372592SN/A    if (arrayData)
1382592SN/A        delete [] data;
1392592SN/A    else
1402592SN/A        delete data;
1412592SN/A}
1422592SN/A
1432592SN/A/** If there isn't data in the packet, allocate some. */
1442592SN/Avoid
1452641Sstever@eecs.umich.eduPacket::allocate()
1462641Sstever@eecs.umich.edu{
1472592SN/A    if (data)
1482592SN/A        return;
1492592SN/A    assert(!staticData);
1502592SN/A    dynamicData = true;
1512592SN/A    arrayData = true;
1522641Sstever@eecs.umich.edu    data = new uint8_t[getSize()];
1532592SN/A}
1542592SN/A
1552592SN/A/** Do the packet modify the same addresses. */
1562592SN/Abool
1573349Sbinkertn@umich.eduPacket::intersect(PacketPtr p)
1582641Sstever@eecs.umich.edu{
1592641Sstever@eecs.umich.edu    Addr s1 = getAddr();
1603242Sgblack@eecs.umich.edu    Addr e1 = getAddr() + getSize() - 1;
1612641Sstever@eecs.umich.edu    Addr s2 = p->getAddr();
1623242Sgblack@eecs.umich.edu    Addr e2 = p->getAddr() + p->getSize() - 1;
1632592SN/A
1643242Sgblack@eecs.umich.edu    return !(s1 > e2 || e1 < s2);
1652592SN/A}
1662592SN/A
1672641Sstever@eecs.umich.edubool
1683607Srdreslin@umich.edufixDelayedResponsePacket(PacketPtr func, PacketPtr timing)
1693607Srdreslin@umich.edu{
1703607Srdreslin@umich.edu    bool result;
1713607Srdreslin@umich.edu
1723607Srdreslin@umich.edu    if (timing->isRead() || timing->isWrite()) {
1734022Sstever@eecs.umich.edu        // Ugly hack to deal with the fact that we queue the requests
1744022Sstever@eecs.umich.edu        // and don't convert them to responses until we issue them on
1754022Sstever@eecs.umich.edu        // the bus.  I tried to avoid this by converting packets to
1764022Sstever@eecs.umich.edu        // responses right away, but this breaks during snoops where a
1774022Sstever@eecs.umich.edu        // responder may do the conversion before other caches have
1784022Sstever@eecs.umich.edu        // done the snoop.  Would work if we copied the packet instead
1794022Sstever@eecs.umich.edu        // of just hanging on to a pointer.
1804022Sstever@eecs.umich.edu        MemCmd oldCmd = timing->cmd;
1814022Sstever@eecs.umich.edu        timing->cmd = timing->cmd.responseCommand();
1823607Srdreslin@umich.edu        result = fixPacket(func, timing);
1834022Sstever@eecs.umich.edu        timing->cmd = oldCmd;
1843607Srdreslin@umich.edu    }
1853607Srdreslin@umich.edu    else {
1863607Srdreslin@umich.edu        //Don't toggle if it isn't a read/write response
1873607Srdreslin@umich.edu        result = fixPacket(func, timing);
1883607Srdreslin@umich.edu    }
1893607Srdreslin@umich.edu
1903607Srdreslin@umich.edu    return result;
1913607Srdreslin@umich.edu}
1923607Srdreslin@umich.edu
1933607Srdreslin@umich.edubool
1944626Sstever@eecs.umich.eduPacket::checkFunctional(Addr addr, int size, uint8_t *data)
1952641Sstever@eecs.umich.edu{
1964626Sstever@eecs.umich.edu    Addr func_start = getAddr();
1974626Sstever@eecs.umich.edu    Addr func_end   = getAddr() + getSize() - 1;
1984626Sstever@eecs.umich.edu    Addr val_start  = addr;
1994626Sstever@eecs.umich.edu    Addr val_end    = val_start + size - 1;
2003260Ssaidi@eecs.umich.edu
2014626Sstever@eecs.umich.edu    if (func_start > val_end || val_start > func_end) {
2024626Sstever@eecs.umich.edu        // no intersection
2034626Sstever@eecs.umich.edu        return false;
2044626Sstever@eecs.umich.edu    }
2053260Ssaidi@eecs.umich.edu
2064626Sstever@eecs.umich.edu    // offset of functional request into supplied value (could be
2074626Sstever@eecs.umich.edu    // negative if partial overlap)
2084626Sstever@eecs.umich.edu    int offset = func_start - val_start;
2093260Ssaidi@eecs.umich.edu
2104626Sstever@eecs.umich.edu    if (isRead()) {
2114626Sstever@eecs.umich.edu        if (func_start >= val_start && func_end <= val_end) {
2124626Sstever@eecs.umich.edu            allocate();
2134626Sstever@eecs.umich.edu            std::memcpy(getPtr<uint8_t>(), data + offset, getSize());
2144870Sstever@eecs.umich.edu            makeResponse();
2154626Sstever@eecs.umich.edu            return true;
2163260Ssaidi@eecs.umich.edu        } else {
2174489Sstever@eecs.umich.edu            // In this case the timing packet only partially satisfies
2184489Sstever@eecs.umich.edu            // the request, so we would need more information to make
2194489Sstever@eecs.umich.edu            // this work.  Like bytes valid in the packet or
2204489Sstever@eecs.umich.edu            // something, so the request could continue and get this
2214489Sstever@eecs.umich.edu            // bit of possibly newer data along with the older data
2224489Sstever@eecs.umich.edu            // not written to yet.
2234626Sstever@eecs.umich.edu            panic("Memory value only partially satisfies the functional "
2244626Sstever@eecs.umich.edu                  "request. Now what?");
2253260Ssaidi@eecs.umich.edu        }
2264626Sstever@eecs.umich.edu    } else if (isWrite()) {
2274626Sstever@eecs.umich.edu        if (offset >= 0) {
2284626Sstever@eecs.umich.edu            std::memcpy(data + offset, getPtr<uint8_t>(),
2294626Sstever@eecs.umich.edu                        (std::min(func_end, val_end) - func_start) + 1);
2304626Sstever@eecs.umich.edu        } else { // val_start > func_start
2314626Sstever@eecs.umich.edu            std::memcpy(data, getPtr<uint8_t>() - offset,
2324626Sstever@eecs.umich.edu                        (std::min(func_end, val_end) - val_start) + 1);
2333260Ssaidi@eecs.umich.edu        }
2343260Ssaidi@eecs.umich.edu        // we always want to keep going with a write
2354626Sstever@eecs.umich.edu        return false;
2363260Ssaidi@eecs.umich.edu    } else
2374626Sstever@eecs.umich.edu        panic("Don't know how to handle command %s\n", cmdString());
2382641Sstever@eecs.umich.edu}
2393260Ssaidi@eecs.umich.edu
2403260Ssaidi@eecs.umich.edu
2413260Ssaidi@eecs.umich.edustd::ostream &
2423260Ssaidi@eecs.umich.eduoperator<<(std::ostream &o, const Packet &p)
2433260Ssaidi@eecs.umich.edu{
2443260Ssaidi@eecs.umich.edu
2453260Ssaidi@eecs.umich.edu    o << "[0x";
2463260Ssaidi@eecs.umich.edu    o.setf(std::ios_base::hex, std::ios_base::showbase);
2473260Ssaidi@eecs.umich.edu    o <<  p.getAddr();
2483260Ssaidi@eecs.umich.edu    o.unsetf(std::ios_base::hex| std::ios_base::showbase);
2493260Ssaidi@eecs.umich.edu    o <<  ":";
2503260Ssaidi@eecs.umich.edu    o.setf(std::ios_base::hex, std::ios_base::showbase);
2513260Ssaidi@eecs.umich.edu    o <<  p.getAddr() + p.getSize() - 1 << "] ";
2523260Ssaidi@eecs.umich.edu    o.unsetf(std::ios_base::hex| std::ios_base::showbase);
2533260Ssaidi@eecs.umich.edu
2543260Ssaidi@eecs.umich.edu    if (p.isRead())
2553260Ssaidi@eecs.umich.edu        o << "Read ";
2563260Ssaidi@eecs.umich.edu    if (p.isWrite())
2574040Ssaidi@eecs.umich.edu        o << "Write ";
2583260Ssaidi@eecs.umich.edu    if (p.isInvalidate())
2594040Ssaidi@eecs.umich.edu        o << "Invalidate ";
2603260Ssaidi@eecs.umich.edu    if (p.isRequest())
2613260Ssaidi@eecs.umich.edu        o << "Request ";
2623260Ssaidi@eecs.umich.edu    if (p.isResponse())
2633260Ssaidi@eecs.umich.edu        o << "Response ";
2643260Ssaidi@eecs.umich.edu    if (p.hasData())
2653260Ssaidi@eecs.umich.edu        o << "w/Data ";
2663260Ssaidi@eecs.umich.edu
2673260Ssaidi@eecs.umich.edu    o << std::endl;
2683260Ssaidi@eecs.umich.edu    return o;
2693260Ssaidi@eecs.umich.edu}
2703260Ssaidi@eecs.umich.edu
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