packet.cc revision 4432
12568SN/A/* 22568SN/A * Copyright (c) 2006 The Regents of The University of Michigan 32568SN/A * All rights reserved. 42568SN/A * 52568SN/A * Redistribution and use in source and binary forms, with or without 62568SN/A * modification, are permitted provided that the following conditions are 72568SN/A * met: redistributions of source code must retain the above copyright 82568SN/A * notice, this list of conditions and the following disclaimer; 92568SN/A * redistributions in binary form must reproduce the above copyright 102568SN/A * notice, this list of conditions and the following disclaimer in the 112568SN/A * documentation and/or other materials provided with the distribution; 122568SN/A * neither the name of the copyright holders nor the names of its 132568SN/A * contributors may be used to endorse or promote products derived from 142568SN/A * this software without specific prior written permission. 152568SN/A * 162568SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172568SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182568SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192568SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202568SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212568SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222568SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232568SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242568SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252568SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262568SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272665Ssaidi@eecs.umich.edu * 282665Ssaidi@eecs.umich.edu * Authors: Ali Saidi 292665Ssaidi@eecs.umich.edu * Steve Reinhardt 302568SN/A */ 312568SN/A 322568SN/A/** 332568SN/A * @file 342568SN/A * Definition of the Packet Class, a packet is a transaction occuring 352568SN/A * between a single level of the memory heirarchy (ie L1->L2). 362568SN/A */ 373260Ssaidi@eecs.umich.edu 383260Ssaidi@eecs.umich.edu#include <iostream> 393918Ssaidi@eecs.umich.edu#include <cstring> 402590SN/A#include "base/misc.hh" 413348Sbinkertn@umich.edu#include "base/trace.hh" 422568SN/A#include "mem/packet.hh" 432568SN/A 444022Sstever@eecs.umich.edu// The one downside to bitsets is that static initializers can get ugly. 454022Sstever@eecs.umich.edu#define SET1(a1) (1 << (a1)) 464022Sstever@eecs.umich.edu#define SET2(a1, a2) (SET1(a1) | SET1(a2)) 474022Sstever@eecs.umich.edu#define SET3(a1, a2, a3) (SET2(a1, a2) | SET1(a3)) 484022Sstever@eecs.umich.edu#define SET4(a1, a2, a3, a4) (SET3(a1, a2, a3) | SET1(a4)) 494022Sstever@eecs.umich.edu#define SET5(a1, a2, a3, a4, a5) (SET4(a1, a2, a3, a4) | SET1(a5)) 504022Sstever@eecs.umich.edu#define SET6(a1, a2, a3, a4, a5, a6) (SET5(a1, a2, a3, a4, a5) | SET1(a6)) 512641Sstever@eecs.umich.edu 524022Sstever@eecs.umich.educonst MemCmd::CommandInfo 534022Sstever@eecs.umich.eduMemCmd::commandInfo[] = 542641Sstever@eecs.umich.edu{ 554022Sstever@eecs.umich.edu /* InvalidCmd */ 564022Sstever@eecs.umich.edu { 0, InvalidCmd, "InvalidCmd" }, 574022Sstever@eecs.umich.edu /* ReadReq */ 584022Sstever@eecs.umich.edu { SET3(IsRead, IsRequest, NeedsResponse), ReadResp, "ReadReq" }, 594022Sstever@eecs.umich.edu /* WriteReq */ 604022Sstever@eecs.umich.edu { SET4(IsWrite, IsRequest, NeedsResponse, HasData), 614022Sstever@eecs.umich.edu WriteResp, "WriteReq" }, 624022Sstever@eecs.umich.edu /* WriteReqNoAck */ 634022Sstever@eecs.umich.edu { SET3(IsWrite, IsRequest, HasData), InvalidCmd, "WriteReqNoAck" }, 644022Sstever@eecs.umich.edu /* ReadResp */ 654022Sstever@eecs.umich.edu { SET3(IsRead, IsResponse, HasData), InvalidCmd, "ReadResp" }, 664022Sstever@eecs.umich.edu /* WriteResp */ 674022Sstever@eecs.umich.edu { SET2(IsWrite, IsResponse), InvalidCmd, "WriteResp" }, 684022Sstever@eecs.umich.edu /* Writeback */ 694022Sstever@eecs.umich.edu { SET3(IsWrite, IsRequest, HasData), InvalidCmd, "Writeback" }, 704022Sstever@eecs.umich.edu /* SoftPFReq */ 714022Sstever@eecs.umich.edu { SET4(IsRead, IsRequest, IsSWPrefetch, NeedsResponse), 724022Sstever@eecs.umich.edu SoftPFResp, "SoftPFReq" }, 734022Sstever@eecs.umich.edu /* HardPFReq */ 744022Sstever@eecs.umich.edu { SET4(IsRead, IsRequest, IsHWPrefetch, NeedsResponse), 754022Sstever@eecs.umich.edu HardPFResp, "HardPFReq" }, 764022Sstever@eecs.umich.edu /* SoftPFResp */ 774022Sstever@eecs.umich.edu { SET4(IsRead, IsResponse, IsSWPrefetch, HasData), 784022Sstever@eecs.umich.edu InvalidCmd, "SoftPFResp" }, 794022Sstever@eecs.umich.edu /* HardPFResp */ 804022Sstever@eecs.umich.edu { SET4(IsRead, IsResponse, IsHWPrefetch, HasData), 814022Sstever@eecs.umich.edu InvalidCmd, "HardPFResp" }, 824022Sstever@eecs.umich.edu /* InvalidateReq */ 834022Sstever@eecs.umich.edu { SET2(IsInvalidate, IsRequest), InvalidCmd, "InvalidateReq" }, 844022Sstever@eecs.umich.edu /* WriteInvalidateReq */ 854022Sstever@eecs.umich.edu { SET5(IsWrite, IsInvalidate, IsRequest, HasData, NeedsResponse), 864022Sstever@eecs.umich.edu WriteInvalidateResp, "WriteInvalidateReq" }, 874022Sstever@eecs.umich.edu /* WriteInvalidateResp */ 884432Ssaidi@eecs.umich.edu { SET3(IsWrite, IsInvalidate, IsResponse), 894022Sstever@eecs.umich.edu InvalidCmd, "WriteInvalidateResp" }, 904022Sstever@eecs.umich.edu /* UpgradeReq */ 914022Sstever@eecs.umich.edu { SET3(IsInvalidate, IsRequest, IsUpgrade), InvalidCmd, "UpgradeReq" }, 924022Sstever@eecs.umich.edu /* ReadExReq */ 934022Sstever@eecs.umich.edu { SET4(IsRead, IsInvalidate, IsRequest, NeedsResponse), 944022Sstever@eecs.umich.edu ReadExResp, "ReadExReq" }, 954022Sstever@eecs.umich.edu /* ReadExResp */ 964022Sstever@eecs.umich.edu { SET4(IsRead, IsInvalidate, IsResponse, HasData), 974040Ssaidi@eecs.umich.edu InvalidCmd, "ReadExResp" }, 984040Ssaidi@eecs.umich.edu /* SwapReq -- for Swap ldstub type operations */ 994040Ssaidi@eecs.umich.edu { SET4(IsReadWrite, IsRequest, HasData, NeedsResponse), 1004040Ssaidi@eecs.umich.edu SwapResp, "SwapReq" }, 1014040Ssaidi@eecs.umich.edu /* SwapResp -- for Swap ldstub type operations */ 1024040Ssaidi@eecs.umich.edu { SET3(IsReadWrite, IsResponse, HasData), 1034040Ssaidi@eecs.umich.edu InvalidCmd, "SwapResp" } 1044022Sstever@eecs.umich.edu}; 1052592SN/A 1062811Srdreslin@umich.edu 1072592SN/A/** delete the data pointed to in the data pointer. Ok to call to matter how 1082592SN/A * data was allocted. */ 1092592SN/Avoid 1102641Sstever@eecs.umich.eduPacket::deleteData() 1112641Sstever@eecs.umich.edu{ 1122592SN/A assert(staticData || dynamicData); 1132592SN/A if (staticData) 1142592SN/A return; 1152592SN/A 1162592SN/A if (arrayData) 1172592SN/A delete [] data; 1182592SN/A else 1192592SN/A delete data; 1202592SN/A} 1212592SN/A 1222592SN/A/** If there isn't data in the packet, allocate some. */ 1232592SN/Avoid 1242641Sstever@eecs.umich.eduPacket::allocate() 1252641Sstever@eecs.umich.edu{ 1262592SN/A if (data) 1272592SN/A return; 1282592SN/A assert(!staticData); 1292592SN/A dynamicData = true; 1302592SN/A arrayData = true; 1312641Sstever@eecs.umich.edu data = new uint8_t[getSize()]; 1322592SN/A} 1332592SN/A 1342592SN/A/** Do the packet modify the same addresses. */ 1352592SN/Abool 1363349Sbinkertn@umich.eduPacket::intersect(PacketPtr p) 1372641Sstever@eecs.umich.edu{ 1382641Sstever@eecs.umich.edu Addr s1 = getAddr(); 1393242Sgblack@eecs.umich.edu Addr e1 = getAddr() + getSize() - 1; 1402641Sstever@eecs.umich.edu Addr s2 = p->getAddr(); 1413242Sgblack@eecs.umich.edu Addr e2 = p->getAddr() + p->getSize() - 1; 1422592SN/A 1433242Sgblack@eecs.umich.edu return !(s1 > e2 || e1 < s2); 1442592SN/A} 1452592SN/A 1462641Sstever@eecs.umich.edubool 1473607Srdreslin@umich.edufixDelayedResponsePacket(PacketPtr func, PacketPtr timing) 1483607Srdreslin@umich.edu{ 1493607Srdreslin@umich.edu bool result; 1503607Srdreslin@umich.edu 1513607Srdreslin@umich.edu if (timing->isRead() || timing->isWrite()) { 1524022Sstever@eecs.umich.edu // Ugly hack to deal with the fact that we queue the requests 1534022Sstever@eecs.umich.edu // and don't convert them to responses until we issue them on 1544022Sstever@eecs.umich.edu // the bus. I tried to avoid this by converting packets to 1554022Sstever@eecs.umich.edu // responses right away, but this breaks during snoops where a 1564022Sstever@eecs.umich.edu // responder may do the conversion before other caches have 1574022Sstever@eecs.umich.edu // done the snoop. Would work if we copied the packet instead 1584022Sstever@eecs.umich.edu // of just hanging on to a pointer. 1594022Sstever@eecs.umich.edu MemCmd oldCmd = timing->cmd; 1604022Sstever@eecs.umich.edu timing->cmd = timing->cmd.responseCommand(); 1613607Srdreslin@umich.edu result = fixPacket(func, timing); 1624022Sstever@eecs.umich.edu timing->cmd = oldCmd; 1633607Srdreslin@umich.edu } 1643607Srdreslin@umich.edu else { 1653607Srdreslin@umich.edu //Don't toggle if it isn't a read/write response 1663607Srdreslin@umich.edu result = fixPacket(func, timing); 1673607Srdreslin@umich.edu } 1683607Srdreslin@umich.edu 1693607Srdreslin@umich.edu return result; 1703607Srdreslin@umich.edu} 1713607Srdreslin@umich.edu 1723607Srdreslin@umich.edubool 1733349Sbinkertn@umich.edufixPacket(PacketPtr func, PacketPtr timing) 1742641Sstever@eecs.umich.edu{ 1753260Ssaidi@eecs.umich.edu Addr funcStart = func->getAddr(); 1763260Ssaidi@eecs.umich.edu Addr funcEnd = func->getAddr() + func->getSize() - 1; 1773260Ssaidi@eecs.umich.edu Addr timingStart = timing->getAddr(); 1783260Ssaidi@eecs.umich.edu Addr timingEnd = timing->getAddr() + timing->getSize() - 1; 1793260Ssaidi@eecs.umich.edu 1803342Srdreslin@umich.edu assert(!(funcStart > timingEnd || timingStart > funcEnd)); 1813260Ssaidi@eecs.umich.edu 1823260Ssaidi@eecs.umich.edu // this packet can't solve our problem, continue on 1833260Ssaidi@eecs.umich.edu if (!timing->hasData()) 1843260Ssaidi@eecs.umich.edu return true; 1853260Ssaidi@eecs.umich.edu 1863260Ssaidi@eecs.umich.edu if (func->isRead()) { 1873260Ssaidi@eecs.umich.edu if (funcStart >= timingStart && funcEnd <= timingEnd) { 1883260Ssaidi@eecs.umich.edu func->allocate(); 1893918Ssaidi@eecs.umich.edu std::memcpy(func->getPtr<uint8_t>(), timing->getPtr<uint8_t>() + 1903260Ssaidi@eecs.umich.edu funcStart - timingStart, func->getSize()); 1913260Ssaidi@eecs.umich.edu func->result = Packet::Success; 1923605Srdreslin@umich.edu func->flags |= SATISFIED; 1933260Ssaidi@eecs.umich.edu return false; 1943260Ssaidi@eecs.umich.edu } else { 1953260Ssaidi@eecs.umich.edu // In this case the timing packet only partially satisfies the 1963260Ssaidi@eecs.umich.edu // requset, so we would need more information to make this work. 1973260Ssaidi@eecs.umich.edu // Like bytes valid in the packet or something, so the request could 1983260Ssaidi@eecs.umich.edu // continue and get this bit of possibly newer data along with the 1993260Ssaidi@eecs.umich.edu // older data not written to yet. 2003260Ssaidi@eecs.umich.edu panic("Timing packet only partially satisfies the functional" 2013260Ssaidi@eecs.umich.edu "request. Now what?"); 2023260Ssaidi@eecs.umich.edu } 2033260Ssaidi@eecs.umich.edu } else if (func->isWrite()) { 2043260Ssaidi@eecs.umich.edu if (funcStart >= timingStart) { 2053918Ssaidi@eecs.umich.edu std::memcpy(timing->getPtr<uint8_t>() + (funcStart - timingStart), 2063260Ssaidi@eecs.umich.edu func->getPtr<uint8_t>(), 2073605Srdreslin@umich.edu (std::min(funcEnd, timingEnd) - funcStart) + 1); 2083260Ssaidi@eecs.umich.edu } else { // timingStart > funcStart 2093918Ssaidi@eecs.umich.edu std::memcpy(timing->getPtr<uint8_t>(), 2103260Ssaidi@eecs.umich.edu func->getPtr<uint8_t>() + (timingStart - funcStart), 2113605Srdreslin@umich.edu (std::min(funcEnd, timingEnd) - timingStart) + 1); 2123260Ssaidi@eecs.umich.edu } 2133260Ssaidi@eecs.umich.edu // we always want to keep going with a write 2143260Ssaidi@eecs.umich.edu return true; 2153260Ssaidi@eecs.umich.edu } else 2163260Ssaidi@eecs.umich.edu panic("Don't know how to handle command type %#x\n", 2173260Ssaidi@eecs.umich.edu func->cmdToIndex()); 2183260Ssaidi@eecs.umich.edu 2192641Sstever@eecs.umich.edu} 2203260Ssaidi@eecs.umich.edu 2213260Ssaidi@eecs.umich.edu 2223260Ssaidi@eecs.umich.edustd::ostream & 2233260Ssaidi@eecs.umich.eduoperator<<(std::ostream &o, const Packet &p) 2243260Ssaidi@eecs.umich.edu{ 2253260Ssaidi@eecs.umich.edu 2263260Ssaidi@eecs.umich.edu o << "[0x"; 2273260Ssaidi@eecs.umich.edu o.setf(std::ios_base::hex, std::ios_base::showbase); 2283260Ssaidi@eecs.umich.edu o << p.getAddr(); 2293260Ssaidi@eecs.umich.edu o.unsetf(std::ios_base::hex| std::ios_base::showbase); 2303260Ssaidi@eecs.umich.edu o << ":"; 2313260Ssaidi@eecs.umich.edu o.setf(std::ios_base::hex, std::ios_base::showbase); 2323260Ssaidi@eecs.umich.edu o << p.getAddr() + p.getSize() - 1 << "] "; 2333260Ssaidi@eecs.umich.edu o.unsetf(std::ios_base::hex| std::ios_base::showbase); 2343260Ssaidi@eecs.umich.edu 2353260Ssaidi@eecs.umich.edu if (p.result == Packet::Success) 2363260Ssaidi@eecs.umich.edu o << "Successful "; 2373260Ssaidi@eecs.umich.edu if (p.result == Packet::BadAddress) 2383260Ssaidi@eecs.umich.edu o << "BadAddress "; 2393260Ssaidi@eecs.umich.edu if (p.result == Packet::Nacked) 2403260Ssaidi@eecs.umich.edu o << "Nacked "; 2413260Ssaidi@eecs.umich.edu if (p.result == Packet::Unknown) 2423260Ssaidi@eecs.umich.edu o << "Inflight "; 2433260Ssaidi@eecs.umich.edu 2443260Ssaidi@eecs.umich.edu if (p.isRead()) 2453260Ssaidi@eecs.umich.edu o << "Read "; 2463260Ssaidi@eecs.umich.edu if (p.isWrite()) 2474040Ssaidi@eecs.umich.edu o << "Write "; 2484040Ssaidi@eecs.umich.edu if (p.isReadWrite()) 2494040Ssaidi@eecs.umich.edu o << "Read/Write "; 2503260Ssaidi@eecs.umich.edu if (p.isInvalidate()) 2514040Ssaidi@eecs.umich.edu o << "Invalidate "; 2523260Ssaidi@eecs.umich.edu if (p.isRequest()) 2533260Ssaidi@eecs.umich.edu o << "Request "; 2543260Ssaidi@eecs.umich.edu if (p.isResponse()) 2553260Ssaidi@eecs.umich.edu o << "Response "; 2563260Ssaidi@eecs.umich.edu if (p.hasData()) 2573260Ssaidi@eecs.umich.edu o << "w/Data "; 2583260Ssaidi@eecs.umich.edu 2593260Ssaidi@eecs.umich.edu o << std::endl; 2603260Ssaidi@eecs.umich.edu return o; 2613260Ssaidi@eecs.umich.edu} 2623260Ssaidi@eecs.umich.edu 263