noncoherent_xbar.hh revision 2982
1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Ron Dreslinski 29 * Ali Saidi 30 */ 31 32/** 33 * @file 34 * Declaration of a bus object. 35 */ 36 37#ifndef __MEM_BUS_HH__ 38#define __MEM_BUS_HH__ 39 40#include <string> 41#include <list> 42#include <inttypes.h> 43 44#include "base/range.hh" 45#include "mem/mem_object.hh" 46#include "mem/packet.hh" 47#include "mem/port.hh" 48#include "mem/request.hh" 49 50class Bus : public MemObject 51{ 52 /** a globally unique id for this bus. */ 53 int busId; 54 55 static const int defaultId = -1; 56 57 struct DevMap { 58 int portId; 59 Range<Addr> range; 60 }; 61 std::vector<DevMap> portList; 62 AddrRangeList defaultRange; 63 64 65 /** Function called by the port when the bus is recieving a Timing 66 transaction.*/ 67 bool recvTiming(Packet *pkt); 68 69 /** Function called by the port when the bus is recieving a Atomic 70 transaction.*/ 71 Tick recvAtomic(Packet *pkt); 72 73 /** Function called by the port when the bus is recieving a Functional 74 transaction.*/ 75 void recvFunctional(Packet *pkt); 76 77 /** Timing function called by port when it is once again able to process 78 * requests. */ 79 void recvRetry(int id); 80 81 /** Function called by the port when the bus is recieving a status change.*/ 82 void recvStatusChange(Port::Status status, int id); 83 84 /** Find which port connected to this bus (if any) should be given a packet 85 * with this address. 86 * @param addr Address to find port for. 87 * @param id Id of the port this packet was received from (to prevent 88 * loops) 89 * @return pointer to port that the packet should be sent out of. 90 */ 91 Port *findPort(Addr addr, int id); 92 93 /** Process address range request. 94 * @param resp addresses that we can respond to 95 * @param snoop addresses that we would like to snoop 96 * @param id ide of the busport that made the request. 97 */ 98 void addressRanges(AddrRangeList &resp, AddrRangeList &snoop, int id); 99 100 101 /** Declaration of the buses port type, one will be instantiated for each 102 of the interfaces connecting to the bus. */ 103 class BusPort : public Port 104 { 105 /** A pointer to the bus to which this port belongs. */ 106 Bus *bus; 107 108 /** A id to keep track of the intercafe ID this port is connected to. */ 109 int id; 110 111 public: 112 113 /** Constructor for the BusPort.*/ 114 BusPort(const std::string &_name, Bus *_bus, int _id) 115 : Port(_name), bus(_bus), id(_id) 116 { } 117 118 protected: 119 120 /** When reciving a timing request from the peer port (at id), 121 pass it to the bus. */ 122 virtual bool recvTiming(Packet *pkt) 123 { pkt->setSrc(id); return bus->recvTiming(pkt); } 124 125 /** When reciving a Atomic requestfrom the peer port (at id), 126 pass it to the bus. */ 127 virtual Tick recvAtomic(Packet *pkt) 128 { pkt->setSrc(id); return bus->recvAtomic(pkt); } 129 130 /** When reciving a Functional requestfrom the peer port (at id), 131 pass it to the bus. */ 132 virtual void recvFunctional(Packet *pkt) 133 { pkt->setSrc(id); bus->recvFunctional(pkt); } 134 135 /** When reciving a status changefrom the peer port (at id), 136 pass it to the bus. */ 137 virtual void recvStatusChange(Status status) 138 { bus->recvStatusChange(status, id); } 139 140 /** When reciving a retry from the peer port (at id), 141 pass it to the bus. */ 142 virtual void recvRetry() 143 { bus->recvRetry(id); } 144 145 // This should return all the 'owned' addresses that are 146 // downstream from this bus, yes? That is, the union of all 147 // the 'owned' address ranges of all the other interfaces on 148 // this bus... 149 virtual void getDeviceAddressRanges(AddrRangeList &resp, 150 AddrRangeList &snoop) 151 { bus->addressRanges(resp, snoop, id); } 152 153 // Hack to make translating port work without changes 154 virtual int deviceBlockSize() { return 32; } 155 156 }; 157 158 /** An array of pointers to the peer port interfaces 159 connected to this bus.*/ 160 std::vector<Port*> interfaces; 161 162 /** An array of pointers to ports that retry should be called on because the 163 * original send failed for whatever reason.*/ 164 std::list<Port*> retryList; 165 166 /** Port that handles requests that don't match any of the interfaces.*/ 167 Port *defaultPort; 168 169 public: 170 171 /** A function used to return the port associated with this bus object. */ 172 virtual Port *getPort(const std::string &if_name, int idx = -1); 173 174 virtual void init(); 175 176 Bus(const std::string &n, int bus_id) 177 : MemObject(n), busId(bus_id), defaultPort(NULL) {} 178 179}; 180 181#endif //__MEM_BUS_HH__ 182