noncoherent_xbar.hh revision 2381
110623Smitch.hayenga@arm.com/* 211439SRekai.GonzalezAlberquilla@arm.com * Copyright (c) 2002-2005 The Regents of The University of Michigan 310623Smitch.hayenga@arm.com * All rights reserved. 410623Smitch.hayenga@arm.com * 510623Smitch.hayenga@arm.com * Redistribution and use in source and binary forms, with or without 610623Smitch.hayenga@arm.com * modification, are permitted provided that the following conditions are 710623Smitch.hayenga@arm.com * met: redistributions of source code must retain the above copyright 810623Smitch.hayenga@arm.com * notice, this list of conditions and the following disclaimer; 910623Smitch.hayenga@arm.com * redistributions in binary form must reproduce the above copyright 1010623Smitch.hayenga@arm.com * notice, this list of conditions and the following disclaimer in the 1110623Smitch.hayenga@arm.com * documentation and/or other materials provided with the distribution; 1210623Smitch.hayenga@arm.com * neither the name of the copyright holders nor the names of its 1310623Smitch.hayenga@arm.com * contributors may be used to endorse or promote products derived from 1410623Smitch.hayenga@arm.com * this software without specific prior written permission. 1510623Smitch.hayenga@arm.com * 1610623Smitch.hayenga@arm.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 1710623Smitch.hayenga@arm.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 1810623Smitch.hayenga@arm.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 1910623Smitch.hayenga@arm.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2010623Smitch.hayenga@arm.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2110623Smitch.hayenga@arm.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 2210623Smitch.hayenga@arm.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2310623Smitch.hayenga@arm.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2410623Smitch.hayenga@arm.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2510623Smitch.hayenga@arm.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 2610623Smitch.hayenga@arm.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2710623Smitch.hayenga@arm.com */ 2810623Smitch.hayenga@arm.com 2910623Smitch.hayenga@arm.com/** 3010623Smitch.hayenga@arm.com * @file Decleration of a bus object. 3110623Smitch.hayenga@arm.com */ 3210623Smitch.hayenga@arm.com 3310623Smitch.hayenga@arm.com#ifndef __MEM_BUS_HH__ 3410623Smitch.hayenga@arm.com#define __MEM_BUS_HH__ 3510623Smitch.hayenga@arm.com 3610623Smitch.hayenga@arm.com#include <string> 3710623Smitch.hayenga@arm.com#include <list> 3810623Smitch.hayenga@arm.com#include <inttypes.h> 3910623Smitch.hayenga@arm.com 4011793Sbrandon.potter@amd.com#include "base/range.hh" 4111793Sbrandon.potter@amd.com#include "mem/mem_object.hh" 4210623Smitch.hayenga@arm.com#include "mem/packet.hh" 4310623Smitch.hayenga@arm.com 4410623Smitch.hayenga@arm.comclass Bus : public MemObject 4510623Smitch.hayenga@arm.com{ 4610623Smitch.hayenga@arm.com /** Function called by the port when the bus is recieving a Timing 4710623Smitch.hayenga@arm.com transaction.*/ 4810623Smitch.hayenga@arm.com SendResult recvTiming(Packet &pkt, int id); 4910623Smitch.hayenga@arm.com 5010623Smitch.hayenga@arm.com /** Function called by the port when the bus is recieving a Atomic 5110623Smitch.hayenga@arm.com transaction.*/ 5210623Smitch.hayenga@arm.com SendResult recvAtomic(Packet &pkt, int id); 5310623Smitch.hayenga@arm.com 5410623Smitch.hayenga@arm.com /** Function called by the port when the bus is recieving a Functional 5510623Smitch.hayenga@arm.com transaction.*/ 5610623Smitch.hayenga@arm.com SendResult recvFunctional(Packet &pkt, int id); 5710623Smitch.hayenga@arm.com 5810623Smitch.hayenga@arm.com /** Function called by the port when the bus is recieving a status change.*/ 5910623Smitch.hayenga@arm.com void recvStatusChange(Port::Status status, int id); 6010623Smitch.hayenga@arm.com 6110623Smitch.hayenga@arm.com /** Decleration of the buses port type, one will be instantiated for each 6210623Smitch.hayenga@arm.com of the interfaces connecting to the bus. */ 6310623Smitch.hayenga@arm.com class BusPort : public Port 6410623Smitch.hayenga@arm.com { 6510623Smitch.hayenga@arm.com /** A pointer to the bus to which this port belongs. */ 6610623Smitch.hayenga@arm.com Bus *bus; 6711439SRekai.GonzalezAlberquilla@arm.com 6810623Smitch.hayenga@arm.com /** A id to keep track of the intercafe ID this port is connected to. */ 6910623Smitch.hayenga@arm.com int id; 7010623Smitch.hayenga@arm.com 7110623Smitch.hayenga@arm.com public: 7210623Smitch.hayenga@arm.com 7310623Smitch.hayenga@arm.com /** Constructor for the BusPort.*/ 7410623Smitch.hayenga@arm.com BusPort(Bus *_bus, int _id) 7510623Smitch.hayenga@arm.com : bus(_bus), id(_id) 7610623Smitch.hayenga@arm.com { } 7710623Smitch.hayenga@arm.com 7810623Smitch.hayenga@arm.com protected: 7910623Smitch.hayenga@arm.com 8010623Smitch.hayenga@arm.com /** When reciving a timing request from the peer port (at id), 8110623Smitch.hayenga@arm.com pass it to the bus. */ 8210623Smitch.hayenga@arm.com virtual SendResult recvTiming(Packet &pkt) 8310623Smitch.hayenga@arm.com { return bus->recvTiming(pkt, id); } 8410623Smitch.hayenga@arm.com 8510623Smitch.hayenga@arm.com /** When reciving a Atomic requestfrom the peer port (at id), 8611439SRekai.GonzalezAlberquilla@arm.com pass it to the bus. */ 8710623Smitch.hayenga@arm.com virtual SendResult recvAtomic(Packet &pkt) 8810623Smitch.hayenga@arm.com { return bus->recvAtomic(pkt, id); } 8910623Smitch.hayenga@arm.com 9011439SRekai.GonzalezAlberquilla@arm.com /** When reciving a Functional requestfrom the peer port (at id), 9110623Smitch.hayenga@arm.com pass it to the bus. */ 9210623Smitch.hayenga@arm.com virtual SendResult recvFunctional(Packet &pkt) 9311439SRekai.GonzalezAlberquilla@arm.com { return bus->recvFunctional(pkt, id); } 9410623Smitch.hayenga@arm.com 9510623Smitch.hayenga@arm.com /** When reciving a status changefrom the peer port (at id), 9610623Smitch.hayenga@arm.com pass it to the bus. */ 9711439SRekai.GonzalezAlberquilla@arm.com virtual void recvStatusChange(Status status) 9810623Smitch.hayenga@arm.com { bus->recvStatusChange(status, id); } 9911439SRekai.GonzalezAlberquilla@arm.com 10011439SRekai.GonzalezAlberquilla@arm.com // This should return all the 'owned' addresses that are 10111439SRekai.GonzalezAlberquilla@arm.com // downstream from this bus, yes? That is, the union of all 10211439SRekai.GonzalezAlberquilla@arm.com // the 'owned' address ranges of all the other interfaces on 10311439SRekai.GonzalezAlberquilla@arm.com // this bus... 10411439SRekai.GonzalezAlberquilla@arm.com virtual void addressRanges(std::list<Range<Addr> > &range_list, 10511439SRekai.GonzalezAlberquilla@arm.com bool &owner); 10611439SRekai.GonzalezAlberquilla@arm.com }; 10710623Smitch.hayenga@arm.com 10810623Smitch.hayenga@arm.com /** A count of the number of interfaces connected to this bus. */ 10910623Smitch.hayenga@arm.com int num_interfaces; 11010623Smitch.hayenga@arm.com 11110623Smitch.hayenga@arm.com /** An array of pointers to the peer port interfaces 11210623Smitch.hayenga@arm.com connected to this bus.*/ 11310623Smitch.hayenga@arm.com Port *interfaces[]; 11410623Smitch.hayenga@arm.com 11510623Smitch.hayenga@arm.com public: 11610623Smitch.hayenga@arm.com 11710623Smitch.hayenga@arm.com /** A function used to return the port associated with this bus object. */ 11810623Smitch.hayenga@arm.com virtual Port *getPort(const char *if_name) 11910623Smitch.hayenga@arm.com { 12010623Smitch.hayenga@arm.com // if_name ignored? forced to be empty? 12111484Snikos.nikoleris@arm.com int id = num_interfaces++; 12210623Smitch.hayenga@arm.com interfaces[id] = new BusPort(this, id); 12310623Smitch.hayenga@arm.com return interfaces[id]; 12410623Smitch.hayenga@arm.com } 12510623Smitch.hayenga@arm.com}; 12610623Smitch.hayenga@arm.com 12710623Smitch.hayenga@arm.com#endif //__MEM_BUS_HH__ 12811484Snikos.nikoleris@arm.com