coherent_xbar.hh revision 9342 
1/*
2 * Copyright (c) 2011-2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2002-2005 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Ron Dreslinski
41 *          Ali Saidi
42 *          Andreas Hansson
43 *          William Wang
44 */
45
46/**
47 * @file
48 * Declaration of a coherent bus.
49 */
50
51#ifndef __MEM_COHERENT_BUS_HH__
52#define __MEM_COHERENT_BUS_HH__
53
54#include "mem/bus.hh"
55#include "params/CoherentBus.hh"
56
57/**
58 * A coherent bus connects a number of (potentially) snooping masters
59 * and slaves, and routes the request and response packets based on
60 * the address, and also forwards all requests to the snoopers and
61 * deals with the snoop responses.
62 *
63 * The coherent bus can be used as a template for modelling QPI,
64* HyperTransport, ACE and coherent OCP buses, and is typically used
65 * for the L1-to-L2 buses and as the main system interconnect.
66 * @sa  \ref gem5MemorySystem "gem5 Memory System"
67 */
68class CoherentBus : public BaseBus
69{
70
71  protected:
72
73    /**
74     * Declare the three layers of this bus, one for requests, one
75     * for responses, and one for snoop responses
76     */
77    Layer<SlavePort> reqLayer;
78    Layer<MasterPort> respLayer;
79    Layer<SlavePort> snoopRespLayer;
80
81    /**
82     * Declaration of the coherent bus slave port type, one will be
83     * instantiated for each of the master ports connecting to the
84     * bus.
85     */
86    class CoherentBusSlavePort : public SlavePort
87    {
88
89      private:
90
91        /** A reference to the bus to which this port belongs. */
92        CoherentBus &bus;
93
94      public:
95
96        CoherentBusSlavePort(const std::string &_name,
97                             CoherentBus &_bus, PortID _id)
98            : SlavePort(_name, &_bus, _id), bus(_bus)
99        { }
100
101      protected:
102
103        /**
104         * When receiving a timing request, pass it to the bus.
105         */
106        virtual bool recvTimingReq(PacketPtr pkt)
107        { return bus.recvTimingReq(pkt, id); }
108
109        /**
110         * When receiving a timing snoop response, pass it to the bus.
111         */
112        virtual bool recvTimingSnoopResp(PacketPtr pkt)
113        { return bus.recvTimingSnoopResp(pkt, id); }
114
115        /**
116         * When receiving an atomic request, pass it to the bus.
117         */
118        virtual Tick recvAtomic(PacketPtr pkt)
119        { return bus.recvAtomic(pkt, id); }
120
121        /**
122         * When receiving a functional request, pass it to the bus.
123         */
124        virtual void recvFunctional(PacketPtr pkt)
125        { bus.recvFunctional(pkt, id); }
126
127        /**
128         * When receiving a retry, pass it to the bus.
129         */
130        virtual void recvRetry()
131        { panic("Bus slave ports always succeed and should never retry.\n"); }
132
133        /**
134         * Return the union of all adress ranges seen by this bus.
135         */
136        virtual AddrRangeList getAddrRanges() const
137        { return bus.getAddrRanges(); }
138
139        /**
140         * Get the maximum block size as seen by the bus.
141         */
142        virtual unsigned deviceBlockSize() const
143        { return bus.deviceBlockSize(); }
144
145    };
146
147    /**
148     * Declaration of the coherent bus master port type, one will be
149     * instantiated for each of the slave interfaces connecting to the
150     * bus.
151     */
152    class CoherentBusMasterPort : public MasterPort
153    {
154      private:
155        /** A reference to the bus to which this port belongs. */
156        CoherentBus &bus;
157
158      public:
159
160        CoherentBusMasterPort(const std::string &_name,
161                              CoherentBus &_bus, PortID _id)
162            : MasterPort(_name, &_bus, _id), bus(_bus)
163        { }
164
165      protected:
166
167        /**
168         * Determine if this port should be considered a snooper. For
169         * a coherent bus master port this is always true.
170         *
171         * @return a boolean that is true if this port is snooping
172         */
173        virtual bool isSnooping() const
174        { return true; }
175
176        /**
177         * When receiving a timing response, pass it to the bus.
178         */
179        virtual bool recvTimingResp(PacketPtr pkt)
180        { return bus.recvTimingResp(pkt, id); }
181
182        /**
183         * When receiving a timing snoop request, pass it to the bus.
184         */
185        virtual void recvTimingSnoopReq(PacketPtr pkt)
186        { return bus.recvTimingSnoopReq(pkt, id); }
187
188        /**
189         * When receiving an atomic snoop request, pass it to the bus.
190         */
191        virtual Tick recvAtomicSnoop(PacketPtr pkt)
192        { return bus.recvAtomicSnoop(pkt, id); }
193
194        /**
195         * When receiving a functional snoop request, pass it to the bus.
196         */
197        virtual void recvFunctionalSnoop(PacketPtr pkt)
198        { bus.recvFunctionalSnoop(pkt, id); }
199
200        /** When reciving a range change from the peer port (at id),
201            pass it to the bus. */
202        virtual void recvRangeChange()
203        { bus.recvRangeChange(id); }
204
205        /** When reciving a retry from the peer port (at id),
206            pass it to the bus. */
207        virtual void recvRetry()
208        { bus.recvRetry(); }
209
210        // Ask the bus to ask everyone on the bus what their block size is and
211        // take the max of it. This might need to be changed a bit if we ever
212        // support multiple block sizes.
213        virtual unsigned deviceBlockSize() const
214        { return bus.deviceBlockSize(); }
215
216    };
217
218    std::vector<SlavePort*> snoopPorts;
219
220    /**
221     * Store the outstanding requests so we can determine which ones
222     * we generated and which ones were merely forwarded. This is used
223     * in the coherent bus when coherency responses come back.
224     */
225    std::set<RequestPtr> outstandingReq;
226
227    /** Function called by the port when the bus is recieving a Timing
228      request packet.*/
229    virtual bool recvTimingReq(PacketPtr pkt, PortID slave_port_id);
230
231    /** Function called by the port when the bus is recieving a Timing
232      response packet.*/
233    virtual bool recvTimingResp(PacketPtr pkt, PortID master_port_id);
234
235    /** Function called by the port when the bus is recieving a timing
236        snoop request.*/
237    virtual void recvTimingSnoopReq(PacketPtr pkt, PortID master_port_id);
238
239    /** Function called by the port when the bus is recieving a timing
240        snoop response.*/
241    virtual bool recvTimingSnoopResp(PacketPtr pkt, PortID slave_port_id);
242
243    /** Timing function called by port when it is once again able to process
244     * requests. */
245    void recvRetry();
246
247    /**
248     * Forward a timing packet to our snoopers, potentially excluding
249     * one of the connected coherent masters to avoid sending a packet
250     * back to where it came from.
251     *
252     * @param pkt Packet to forward
253     * @param exclude_slave_port_id Id of slave port to exclude
254     */
255    void forwardTiming(PacketPtr pkt, PortID exclude_slave_port_id);
256
257    /** Function called by the port when the bus is recieving a Atomic
258      transaction.*/
259    Tick recvAtomic(PacketPtr pkt, PortID slave_port_id);
260
261    /** Function called by the port when the bus is recieving an
262        atomic snoop transaction.*/
263    Tick recvAtomicSnoop(PacketPtr pkt, PortID master_port_id);
264
265    /**
266     * Forward an atomic packet to our snoopers, potentially excluding
267     * one of the connected coherent masters to avoid sending a packet
268     * back to where it came from.
269     *
270     * @param pkt Packet to forward
271     * @param exclude_slave_port_id Id of slave port to exclude
272     *
273     * @return a pair containing the snoop response and snoop latency
274     */
275    std::pair<MemCmd, Tick> forwardAtomic(PacketPtr pkt,
276                                          PortID exclude_slave_port_id);
277
278    /** Function called by the port when the bus is recieving a Functional
279        transaction.*/
280    void recvFunctional(PacketPtr pkt, PortID slave_port_id);
281
282    /** Function called by the port when the bus is recieving a functional
283        snoop transaction.*/
284    void recvFunctionalSnoop(PacketPtr pkt, PortID master_port_id);
285
286    /**
287     * Forward a functional packet to our snoopers, potentially
288     * excluding one of the connected coherent masters to avoid
289     * sending a packet back to where it came from.
290     *
291     * @param pkt Packet to forward
292     * @param exclude_slave_port_id Id of slave port to exclude
293     */
294    void forwardFunctional(PacketPtr pkt, PortID exclude_slave_port_id);
295
296  public:
297
298    virtual void init();
299
300    CoherentBus(const CoherentBusParams *p);
301
302    unsigned int drain(DrainManager *dm);
303};
304
305#endif //__MEM_COHERENT_BUS_HH__
306