coherent_xbar.hh revision 10883
12381SN/A/* 210719SMarco.Balboni@ARM.com * Copyright (c) 2011-2015 ARM Limited 38711SN/A * All rights reserved 48711SN/A * 58711SN/A * The license below extends only to copyright in the software and shall 68711SN/A * not be construed as granting a license to any other intellectual 78711SN/A * property including but not limited to intellectual property relating 88711SN/A * to a hardware implementation of the functionality of the software 98711SN/A * licensed hereunder. You may use the software subject to the license 108711SN/A * terms below provided that you ensure that this notice is replicated 118711SN/A * unmodified and in its entirety in all distributions of the software, 128711SN/A * modified or unmodified, in source code or in binary form. 138711SN/A * 142381SN/A * Copyright (c) 2002-2005 The Regents of The University of Michigan 152381SN/A * All rights reserved. 162381SN/A * 172381SN/A * Redistribution and use in source and binary forms, with or without 182381SN/A * modification, are permitted provided that the following conditions are 192381SN/A * met: redistributions of source code must retain the above copyright 202381SN/A * notice, this list of conditions and the following disclaimer; 212381SN/A * redistributions in binary form must reproduce the above copyright 222381SN/A * notice, this list of conditions and the following disclaimer in the 232381SN/A * documentation and/or other materials provided with the distribution; 242381SN/A * neither the name of the copyright holders nor the names of its 252381SN/A * contributors may be used to endorse or promote products derived from 262381SN/A * this software without specific prior written permission. 272381SN/A * 282381SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 292381SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 302381SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 312381SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 322381SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 332381SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 342381SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 352381SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 362381SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 372381SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 382381SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 392665SN/A * 402665SN/A * Authors: Ron Dreslinski 412772SN/A * Ali Saidi 428715SN/A * Andreas Hansson 438922SN/A * William Wang 442381SN/A */ 452381SN/A 462381SN/A/** 472982SN/A * @file 4810405Sandreas.hansson@arm.com * Declaration of a coherent crossbar. 492381SN/A */ 502381SN/A 5110405Sandreas.hansson@arm.com#ifndef __MEM_COHERENT_XBAR_HH__ 5210405Sandreas.hansson@arm.com#define __MEM_COHERENT_XBAR_HH__ 532381SN/A 5410402SN/A#include "mem/snoop_filter.hh" 5510405Sandreas.hansson@arm.com#include "mem/xbar.hh" 5610405Sandreas.hansson@arm.com#include "params/CoherentXBar.hh" 572381SN/A 589036SN/A/** 5910405Sandreas.hansson@arm.com * A coherent crossbar connects a number of (potentially) snooping 6010405Sandreas.hansson@arm.com * masters and slaves, and routes the request and response packets 6110405Sandreas.hansson@arm.com * based on the address, and also forwards all requests to the 6210405Sandreas.hansson@arm.com * snoopers and deals with the snoop responses. 639036SN/A * 6410405Sandreas.hansson@arm.com * The coherent crossbar can be used as a template for modelling QPI, 6510405Sandreas.hansson@arm.com * HyperTransport, ACE and coherent OCP buses, and is typically used 6610405Sandreas.hansson@arm.com * for the L1-to-L2 buses and as the main system interconnect. @sa 6710405Sandreas.hansson@arm.com * \ref gem5MemorySystem "gem5 Memory System" 689036SN/A */ 6910405Sandreas.hansson@arm.comclass CoherentXBar : public BaseXBar 702381SN/A{ 719031SN/A 729036SN/A protected: 739036SN/A 748922SN/A /** 7510405Sandreas.hansson@arm.com * Declare the layers of this crossbar, one vector for requests, 7610405Sandreas.hansson@arm.com * one for responses, and one for snoop responses 779092SN/A */ 789715SN/A std::vector<ReqLayer*> reqLayers; 799715SN/A std::vector<RespLayer*> respLayers; 8010713Sandreas.hansson@arm.com std::vector<SnoopRespLayer*> snoopLayers; 819092SN/A 829092SN/A /** 8310405Sandreas.hansson@arm.com * Declaration of the coherent crossbar slave port type, one will 8410405Sandreas.hansson@arm.com * be instantiated for each of the master ports connecting to the 8510405Sandreas.hansson@arm.com * crossbar. 868922SN/A */ 8710405Sandreas.hansson@arm.com class CoherentXBarSlavePort : public SlavePort 882381SN/A { 899036SN/A 908922SN/A private: 919036SN/A 9210405Sandreas.hansson@arm.com /** A reference to the crossbar to which this port belongs. */ 9310405Sandreas.hansson@arm.com CoherentXBar &xbar; 942381SN/A 952381SN/A public: 962381SN/A 9710405Sandreas.hansson@arm.com CoherentXBarSlavePort(const std::string &_name, 9810405Sandreas.hansson@arm.com CoherentXBar &_xbar, PortID _id) 9910405Sandreas.hansson@arm.com : SlavePort(_name, &_xbar, _id), xbar(_xbar) 1008922SN/A { } 1018922SN/A 1028922SN/A protected: 1038922SN/A 1048948SN/A /** 10510405Sandreas.hansson@arm.com * When receiving a timing request, pass it to the crossbar. 1068948SN/A */ 1078975SN/A virtual bool recvTimingReq(PacketPtr pkt) 10810405Sandreas.hansson@arm.com { return xbar.recvTimingReq(pkt, id); } 1098922SN/A 1108948SN/A /** 11110405Sandreas.hansson@arm.com * When receiving a timing snoop response, pass it to the crossbar. 1128948SN/A */ 1138975SN/A virtual bool recvTimingSnoopResp(PacketPtr pkt) 11410405Sandreas.hansson@arm.com { return xbar.recvTimingSnoopResp(pkt, id); } 1158948SN/A 1168948SN/A /** 11710405Sandreas.hansson@arm.com * When receiving an atomic request, pass it to the crossbar. 1188948SN/A */ 1198922SN/A virtual Tick recvAtomic(PacketPtr pkt) 12010405Sandreas.hansson@arm.com { return xbar.recvAtomic(pkt, id); } 1218922SN/A 1228948SN/A /** 12310405Sandreas.hansson@arm.com * When receiving a functional request, pass it to the crossbar. 1248948SN/A */ 1258922SN/A virtual void recvFunctional(PacketPtr pkt) 12610405Sandreas.hansson@arm.com { xbar.recvFunctional(pkt, id); } 1278922SN/A 1288948SN/A /** 12910405Sandreas.hansson@arm.com * When receiving a retry, pass it to the crossbar. 1308948SN/A */ 13110713Sandreas.hansson@arm.com virtual void recvRespRetry() 13210405Sandreas.hansson@arm.com { panic("Crossbar slave ports should never retry.\n"); } 1338922SN/A 1349036SN/A /** 13510405Sandreas.hansson@arm.com * Return the union of all adress ranges seen by this crossbar. 1369036SN/A */ 1379090SN/A virtual AddrRangeList getAddrRanges() const 13810405Sandreas.hansson@arm.com { return xbar.getAddrRanges(); } 1399036SN/A 1409036SN/A }; 1419036SN/A 1429036SN/A /** 14310405Sandreas.hansson@arm.com * Declaration of the coherent crossbar master port type, one will be 1449036SN/A * instantiated for each of the slave interfaces connecting to the 14510405Sandreas.hansson@arm.com * crossbar. 1469036SN/A */ 14710405Sandreas.hansson@arm.com class CoherentXBarMasterPort : public MasterPort 1489036SN/A { 1499036SN/A private: 15010405Sandreas.hansson@arm.com /** A reference to the crossbar to which this port belongs. */ 15110405Sandreas.hansson@arm.com CoherentXBar &xbar; 1529036SN/A 1539036SN/A public: 1549036SN/A 15510405Sandreas.hansson@arm.com CoherentXBarMasterPort(const std::string &_name, 15610405Sandreas.hansson@arm.com CoherentXBar &_xbar, PortID _id) 15710405Sandreas.hansson@arm.com : MasterPort(_name, &_xbar, _id), xbar(_xbar) 1589036SN/A { } 1599036SN/A 1609036SN/A protected: 1619036SN/A 1629036SN/A /** 1639036SN/A * Determine if this port should be considered a snooper. For 16410405Sandreas.hansson@arm.com * a coherent crossbar master port this is always true. 1659036SN/A * 1669036SN/A * @return a boolean that is true if this port is snooping 1679036SN/A */ 1689036SN/A virtual bool isSnooping() const 1699036SN/A { return true; } 1709036SN/A 1719036SN/A /** 17210405Sandreas.hansson@arm.com * When receiving a timing response, pass it to the crossbar. 1739036SN/A */ 1749036SN/A virtual bool recvTimingResp(PacketPtr pkt) 17510405Sandreas.hansson@arm.com { return xbar.recvTimingResp(pkt, id); } 1769036SN/A 1779036SN/A /** 17810405Sandreas.hansson@arm.com * When receiving a timing snoop request, pass it to the crossbar. 1799036SN/A */ 1809036SN/A virtual void recvTimingSnoopReq(PacketPtr pkt) 18110405Sandreas.hansson@arm.com { return xbar.recvTimingSnoopReq(pkt, id); } 1829036SN/A 1839036SN/A /** 18410405Sandreas.hansson@arm.com * When receiving an atomic snoop request, pass it to the crossbar. 1859036SN/A */ 1869036SN/A virtual Tick recvAtomicSnoop(PacketPtr pkt) 18710405Sandreas.hansson@arm.com { return xbar.recvAtomicSnoop(pkt, id); } 1889036SN/A 1899036SN/A /** 19010405Sandreas.hansson@arm.com * When receiving a functional snoop request, pass it to the crossbar. 1919036SN/A */ 1929036SN/A virtual void recvFunctionalSnoop(PacketPtr pkt) 19310405Sandreas.hansson@arm.com { xbar.recvFunctionalSnoop(pkt, id); } 1949036SN/A 1959036SN/A /** When reciving a range change from the peer port (at id), 19610405Sandreas.hansson@arm.com pass it to the crossbar. */ 1979036SN/A virtual void recvRangeChange() 19810405Sandreas.hansson@arm.com { xbar.recvRangeChange(id); } 1999036SN/A 2009036SN/A /** When reciving a retry from the peer port (at id), 20110405Sandreas.hansson@arm.com pass it to the crossbar. */ 20210713Sandreas.hansson@arm.com virtual void recvReqRetry() 20310713Sandreas.hansson@arm.com { xbar.recvReqRetry(id); } 2048922SN/A 2058922SN/A }; 2068922SN/A 2079716SN/A /** 2089716SN/A * Internal class to bridge between an incoming snoop response 2099716SN/A * from a slave port and forwarding it through an outgoing slave 2109716SN/A * port. It is effectively a dangling master port. 2119716SN/A */ 2129716SN/A class SnoopRespPort : public MasterPort 2139716SN/A { 2149716SN/A 2159716SN/A private: 2169716SN/A 2179716SN/A /** The port which we mirror internally. */ 2189716SN/A SlavePort& slavePort; 2199716SN/A 2209716SN/A public: 2219716SN/A 2229716SN/A /** 2239716SN/A * Create a snoop response port that mirrors a given slave port. 2249716SN/A */ 22510405Sandreas.hansson@arm.com SnoopRespPort(SlavePort& slave_port, CoherentXBar& _xbar) : 22610405Sandreas.hansson@arm.com MasterPort(slave_port.name() + ".snoopRespPort", &_xbar), 2279778SN/A slavePort(slave_port) { } 2289716SN/A 2299716SN/A /** 2309716SN/A * Override the sending of retries and pass them on through 2319716SN/A * the mirrored slave port. 2329716SN/A */ 23310713Sandreas.hansson@arm.com void sendRetryResp() { 23410713Sandreas.hansson@arm.com // forward it as a snoop response retry 23510713Sandreas.hansson@arm.com slavePort.sendRetrySnoopResp(); 2369716SN/A } 2379716SN/A 2389716SN/A /** 2399716SN/A * Provided as necessary. 2409716SN/A */ 24110713Sandreas.hansson@arm.com void recvReqRetry() { panic("SnoopRespPort should never see retry\n"); } 2429716SN/A 2439716SN/A /** 2449716SN/A * Provided as necessary. 2459716SN/A */ 2469716SN/A bool recvTimingResp(PacketPtr pkt) 2479716SN/A { 2489716SN/A panic("SnoopRespPort should never see timing response\n"); 2499716SN/A return false; 2509716SN/A } 2519716SN/A 2529716SN/A }; 2539716SN/A 2549716SN/A std::vector<SnoopRespPort*> snoopRespPorts; 2559716SN/A 2568966SN/A std::vector<SlavePort*> snoopPorts; 2574475SN/A 2588948SN/A /** 25910656Sandreas.hansson@arm.com * Store the outstanding requests that we are expecting snoop 26010656Sandreas.hansson@arm.com * responses from so we can determine which snoop responses we 26110656Sandreas.hansson@arm.com * generated and which ones were merely forwarded. 2628948SN/A */ 26310656Sandreas.hansson@arm.com m5::hash_set<RequestPtr> outstandingSnoop; 2648948SN/A 2659524SN/A /** 2669524SN/A * Keep a pointer to the system to be allow to querying memory system 2679524SN/A * properties. 2689524SN/A */ 2699524SN/A System *system; 2709524SN/A 27110402SN/A /** A snoop filter that tracks cache line residency and can restrict the 27210402SN/A * broadcast needed for probes. NULL denotes an absent filter. */ 27310402SN/A SnoopFilter *snoopFilter; 27410402SN/A 27510719SMarco.Balboni@ARM.com /** Cycles of snoop response latency.*/ 27610719SMarco.Balboni@ARM.com const Cycles snoopResponseLatency; 27710719SMarco.Balboni@ARM.com 27810883Sali.jafri@arm.com /** 27910883Sali.jafri@arm.com * @todo this is a temporary workaround until the 4-phase code is committed. 28010883Sali.jafri@arm.com * upstream caches need this packet until true is returned, so hold it for 28110883Sali.jafri@arm.com * deletion until a subsequent call 28210883Sali.jafri@arm.com */ 28310883Sali.jafri@arm.com std::vector<PacketPtr> pendingDelete; 28410883Sali.jafri@arm.com 28510405Sandreas.hansson@arm.com /** Function called by the port when the crossbar is recieving a Timing 2868975SN/A request packet.*/ 2879945SN/A bool recvTimingReq(PacketPtr pkt, PortID slave_port_id); 2888975SN/A 28910405Sandreas.hansson@arm.com /** Function called by the port when the crossbar is recieving a Timing 2908975SN/A response packet.*/ 2919945SN/A bool recvTimingResp(PacketPtr pkt, PortID master_port_id); 2924475SN/A 29310405Sandreas.hansson@arm.com /** Function called by the port when the crossbar is recieving a timing 2948975SN/A snoop request.*/ 2959945SN/A void recvTimingSnoopReq(PacketPtr pkt, PortID master_port_id); 2968975SN/A 29710405Sandreas.hansson@arm.com /** Function called by the port when the crossbar is recieving a timing 2988975SN/A snoop response.*/ 2999945SN/A bool recvTimingSnoopResp(PacketPtr pkt, PortID slave_port_id); 3008948SN/A 3019092SN/A /** Timing function called by port when it is once again able to process 3029092SN/A * requests. */ 30310713Sandreas.hansson@arm.com void recvReqRetry(PortID master_port_id); 3049092SN/A 3058948SN/A /** 3068948SN/A * Forward a timing packet to our snoopers, potentially excluding 3078948SN/A * one of the connected coherent masters to avoid sending a packet 3088948SN/A * back to where it came from. 3098948SN/A * 3108948SN/A * @param pkt Packet to forward 3118948SN/A * @param exclude_slave_port_id Id of slave port to exclude 3128948SN/A */ 31310402SN/A void forwardTiming(PacketPtr pkt, PortID exclude_slave_port_id) { 31410402SN/A forwardTiming(pkt, exclude_slave_port_id, snoopPorts); 31510402SN/A } 31610402SN/A 31710402SN/A /** 31810402SN/A * Forward a timing packet to a selected list of snoopers, potentially 31910402SN/A * excluding one of the connected coherent masters to avoid sending a packet 32010402SN/A * back to where it came from. 32110402SN/A * 32210402SN/A * @param pkt Packet to forward 32310402SN/A * @param exclude_slave_port_id Id of slave port to exclude 32410402SN/A * @param dests Vector of destination ports for the forwarded pkt 32510402SN/A */ 32610402SN/A void forwardTiming(PacketPtr pkt, PortID exclude_slave_port_id, 32710402SN/A const std::vector<SlavePort*>& dests); 3288948SN/A 32910405Sandreas.hansson@arm.com /** Function called by the port when the crossbar is recieving a Atomic 3304475SN/A transaction.*/ 3319032SN/A Tick recvAtomic(PacketPtr pkt, PortID slave_port_id); 3324475SN/A 33310405Sandreas.hansson@arm.com /** Function called by the port when the crossbar is recieving an 3348948SN/A atomic snoop transaction.*/ 3359032SN/A Tick recvAtomicSnoop(PacketPtr pkt, PortID master_port_id); 3368948SN/A 3378948SN/A /** 3388948SN/A * Forward an atomic packet to our snoopers, potentially excluding 3398948SN/A * one of the connected coherent masters to avoid sending a packet 3408948SN/A * back to where it came from. 3418948SN/A * 3428948SN/A * @param pkt Packet to forward 3438948SN/A * @param exclude_slave_port_id Id of slave port to exclude 3448948SN/A * 3458948SN/A * @return a pair containing the snoop response and snoop latency 3468948SN/A */ 3478948SN/A std::pair<MemCmd, Tick> forwardAtomic(PacketPtr pkt, 34810402SN/A PortID exclude_slave_port_id) 34910402SN/A { 35010402SN/A return forwardAtomic(pkt, exclude_slave_port_id, InvalidPortID, snoopPorts); 35110402SN/A } 35210402SN/A 35310402SN/A /** 35410402SN/A * Forward an atomic packet to a selected list of snoopers, potentially 35510402SN/A * excluding one of the connected coherent masters to avoid sending a packet 35610402SN/A * back to where it came from. 35710402SN/A * 35810402SN/A * @param pkt Packet to forward 35910402SN/A * @param exclude_slave_port_id Id of slave port to exclude 36010402SN/A * @param source_master_port_id Id of the master port for snoops from below 36110402SN/A * @param dests Vector of destination ports for the forwarded pkt 36210402SN/A * 36310402SN/A * @return a pair containing the snoop response and snoop latency 36410402SN/A */ 36510402SN/A std::pair<MemCmd, Tick> forwardAtomic(PacketPtr pkt, 36610402SN/A PortID exclude_slave_port_id, 36710402SN/A PortID source_master_port_id, 36810402SN/A const std::vector<SlavePort*>& dests); 3698948SN/A 37010405Sandreas.hansson@arm.com /** Function called by the port when the crossbar is recieving a Functional 3714475SN/A transaction.*/ 3729032SN/A void recvFunctional(PacketPtr pkt, PortID slave_port_id); 3734475SN/A 37410405Sandreas.hansson@arm.com /** Function called by the port when the crossbar is recieving a functional 3758948SN/A snoop transaction.*/ 3769032SN/A void recvFunctionalSnoop(PacketPtr pkt, PortID master_port_id); 3778948SN/A 3788948SN/A /** 3798948SN/A * Forward a functional packet to our snoopers, potentially 3808948SN/A * excluding one of the connected coherent masters to avoid 3818948SN/A * sending a packet back to where it came from. 3828948SN/A * 3838948SN/A * @param pkt Packet to forward 3848948SN/A * @param exclude_slave_port_id Id of slave port to exclude 3858948SN/A */ 3869031SN/A void forwardFunctional(PacketPtr pkt, PortID exclude_slave_port_id); 3878948SN/A 38810405Sandreas.hansson@arm.com Stats::Scalar snoops; 38910401SN/A Stats::Distribution snoopFanout; 3909712SN/A 3912381SN/A public: 3922381SN/A 3939036SN/A virtual void init(); 3942568SN/A 39510405Sandreas.hansson@arm.com CoherentXBar(const CoherentXBarParams *p); 3969092SN/A 39710405Sandreas.hansson@arm.com virtual ~CoherentXBar(); 3989715SN/A 3999342SN/A unsigned int drain(DrainManager *dm); 4009712SN/A 4019712SN/A virtual void regStats(); 4022381SN/A}; 4032381SN/A 40410405Sandreas.hansson@arm.com#endif //__MEM_COHERENT_XBAR_HH__ 405