base.hh revision 9663:45df88079f04
12810Srdreslin@umich.edu/* 211870Snikos.nikoleris@arm.com * Copyright (c) 2012 ARM Limited 39796Sprakash.ramrakhyani@arm.com * All rights reserved. 49796Sprakash.ramrakhyani@arm.com * 59796Sprakash.ramrakhyani@arm.com * The license below extends only to copyright in the software and shall 69796Sprakash.ramrakhyani@arm.com * not be construed as granting a license to any other intellectual 79796Sprakash.ramrakhyani@arm.com * property including but not limited to intellectual property relating 89796Sprakash.ramrakhyani@arm.com * to a hardware implementation of the functionality of the software 99796Sprakash.ramrakhyani@arm.com * licensed hereunder. You may use the software subject to the license 109796Sprakash.ramrakhyani@arm.com * terms below provided that you ensure that this notice is replicated 119796Sprakash.ramrakhyani@arm.com * unmodified and in its entirety in all distributions of the software, 129796Sprakash.ramrakhyani@arm.com * modified or unmodified, in source code or in binary form. 139796Sprakash.ramrakhyani@arm.com * 142810Srdreslin@umich.edu * Copyright (c) 2003-2005 The Regents of The University of Michigan 152810Srdreslin@umich.edu * All rights reserved. 162810Srdreslin@umich.edu * 172810Srdreslin@umich.edu * Redistribution and use in source and binary forms, with or without 182810Srdreslin@umich.edu * modification, are permitted provided that the following conditions are 192810Srdreslin@umich.edu * met: redistributions of source code must retain the above copyright 202810Srdreslin@umich.edu * notice, this list of conditions and the following disclaimer; 212810Srdreslin@umich.edu * redistributions in binary form must reproduce the above copyright 222810Srdreslin@umich.edu * notice, this list of conditions and the following disclaimer in the 232810Srdreslin@umich.edu * documentation and/or other materials provided with the distribution; 242810Srdreslin@umich.edu * neither the name of the copyright holders nor the names of its 252810Srdreslin@umich.edu * contributors may be used to endorse or promote products derived from 262810Srdreslin@umich.edu * this software without specific prior written permission. 272810Srdreslin@umich.edu * 282810Srdreslin@umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 292810Srdreslin@umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 302810Srdreslin@umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 312810Srdreslin@umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 322810Srdreslin@umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 332810Srdreslin@umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 342810Srdreslin@umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 352810Srdreslin@umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 362810Srdreslin@umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 372810Srdreslin@umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 382810Srdreslin@umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 392810Srdreslin@umich.edu * 402810Srdreslin@umich.edu * Authors: Erik Hallnor 412810Srdreslin@umich.edu * Ron Dreslinski 422810Srdreslin@umich.edu */ 432810Srdreslin@umich.edu 442810Srdreslin@umich.edu/** 452810Srdreslin@umich.edu * @file 462810Srdreslin@umich.edu * Declaration of a common base class for cache tagstore objects. 472810Srdreslin@umich.edu */ 4811486Snikos.nikoleris@arm.com 4911486Snikos.nikoleris@arm.com#ifndef __BASE_TAGS_HH__ 506216Snate@binkert.org#define __BASE_TAGS_HH__ 512810Srdreslin@umich.edu 522810Srdreslin@umich.edu#include <string> 532810Srdreslin@umich.edu 5412334Sgabeblack@google.com#include "base/callback.hh" 552810Srdreslin@umich.edu#include "base/statistics.hh" 562810Srdreslin@umich.edu 572810Srdreslin@umich.educlass BaseCache; 589796Sprakash.ramrakhyani@arm.com 5910360Sandreas.hansson@arm.com/** 602810Srdreslin@umich.edu * A common base class of Cache tagstore objects. 612810Srdreslin@umich.edu */ 622810Srdreslin@umich.educlass BaseTags 632810Srdreslin@umich.edu{ 642810Srdreslin@umich.edu protected: 652810Srdreslin@umich.edu /** Pointer to the parent cache. */ 662810Srdreslin@umich.edu BaseCache *cache; 672810Srdreslin@umich.edu 682810Srdreslin@umich.edu /** Local copy of the parent cache name. Used for DPRINTF. */ 692810Srdreslin@umich.edu std::string objName; 702810Srdreslin@umich.edu 7111189Sandreas.hansson@arm.com /** 722810Srdreslin@umich.edu * The number of tags that need to be touched to meet the warmup 732810Srdreslin@umich.edu * percentage. 742810Srdreslin@umich.edu */ 752810Srdreslin@umich.edu int warmupBound; 762810Srdreslin@umich.edu /** Marked true when the cache is warmed up. */ 776978SLisa.Hsu@amd.com bool warmedUp; 782810Srdreslin@umich.edu 796978SLisa.Hsu@amd.com /** the number of blocks in the cache */ 802810Srdreslin@umich.edu unsigned numBlocks; 816978SLisa.Hsu@amd.com 822810Srdreslin@umich.edu // Statistics 8311484Snikos.nikoleris@arm.com /** 842810Srdreslin@umich.edu * @addtogroup CacheStatistics 852810Srdreslin@umich.edu * @{ 862810Srdreslin@umich.edu */ 876978SLisa.Hsu@amd.com 8811484Snikos.nikoleris@arm.com /** Number of replacements of valid blocks per thread. */ 892810Srdreslin@umich.edu Stats::Vector replacements; 902810Srdreslin@umich.edu /** Per cycle average of the number of tags that hold valid data. */ 916227Snate@binkert.org Stats::Average tagsInUse; 926227Snate@binkert.org 932810Srdreslin@umich.edu /** The total number of references to a block before it is replaced. */ 946978SLisa.Hsu@amd.com Stats::Scalar totalRefs; 952810Srdreslin@umich.edu 962810Srdreslin@umich.edu /** 972810Srdreslin@umich.edu * The number of reference counts sampled. This is different from 982810Srdreslin@umich.edu * replacements because we sample all the valid blocks when the simulator 992810Srdreslin@umich.edu * exits. 1002810Srdreslin@umich.edu */ 1012810Srdreslin@umich.edu Stats::Scalar sampledRefs; 1022810Srdreslin@umich.edu 1032810Srdreslin@umich.edu /** 1042810Srdreslin@umich.edu * Average number of references to a block before is was replaced. 10510941Sdavid.guillen@arm.com * @todo This should change to an average stat once we have them. 10610941Sdavid.guillen@arm.com */ 1072810Srdreslin@umich.edu Stats::Formula avgRefs; 1082810Srdreslin@umich.edu 1096978SLisa.Hsu@amd.com /** The cycle that the warmup percentage was hit. */ 1102810Srdreslin@umich.edu Stats::Scalar warmupCycle; 1112810Srdreslin@umich.edu 1122810Srdreslin@umich.edu /** Average occupancy of each requestor using the cache */ 1139086Sandreas.hansson@arm.com Stats::AverageVector occupancies; 1149086Sandreas.hansson@arm.com 1159086Sandreas.hansson@arm.com /** Average occ % of each requestor using the cache */ 1169086Sandreas.hansson@arm.com Stats::Formula avgOccs; 1179086Sandreas.hansson@arm.com 1189086Sandreas.hansson@arm.com /** 1199086Sandreas.hansson@arm.com * @} 1209086Sandreas.hansson@arm.com */ 1212810Srdreslin@umich.edu 1229796Sprakash.ramrakhyani@arm.com public: 1232810Srdreslin@umich.edu 1242810Srdreslin@umich.edu /** 1259796Sprakash.ramrakhyani@arm.com * Destructor. 1262810Srdreslin@umich.edu */ 1272810Srdreslin@umich.edu virtual ~BaseTags() {} 1289796Sprakash.ramrakhyani@arm.com 1292810Srdreslin@umich.edu /** 1302810Srdreslin@umich.edu * Set the parent cache back pointer. Also copies the cache name to 1312810Srdreslin@umich.edu * objName. 1322810Srdreslin@umich.edu * @param _cache Pointer to parent cache. 1339796Sprakash.ramrakhyani@arm.com */ 1342810Srdreslin@umich.edu void setCache(BaseCache *_cache); 1352810Srdreslin@umich.edu 1362810Srdreslin@umich.edu /** 1379796Sprakash.ramrakhyani@arm.com * Return the parent cache name. 1382810Srdreslin@umich.edu * @return the parent cache name. 1392810Srdreslin@umich.edu */ 1402810Srdreslin@umich.edu const std::string &name() const 1416227Snate@binkert.org { 1422810Srdreslin@umich.edu return objName; 1432810Srdreslin@umich.edu } 1442810Srdreslin@umich.edu 1452810Srdreslin@umich.edu /** 1462810Srdreslin@umich.edu * Register local statistics. 1472810Srdreslin@umich.edu * @param name The name to preceed each statistic name. 1482810Srdreslin@umich.edu */ 1492810Srdreslin@umich.edu void regStats(const std::string &name); 1502810Srdreslin@umich.edu 1512810Srdreslin@umich.edu /** 1522810Srdreslin@umich.edu * Average in the reference count for valid blocks when the simulation 1532810Srdreslin@umich.edu * exits. 1542810Srdreslin@umich.edu */ 1552810Srdreslin@umich.edu virtual void cleanupRefs() {} 1562810Srdreslin@umich.edu 1572810Srdreslin@umich.edu /** 1582810Srdreslin@umich.edu *iterated through all blocks and clear all locks 1592810Srdreslin@umich.edu *Needed to clear all lock tracking at once 1602810Srdreslin@umich.edu */ 1612810Srdreslin@umich.edu virtual void clearLocks() {} 1622810Srdreslin@umich.edu 16311484Snikos.nikoleris@arm.com /** 1642810Srdreslin@umich.edu * Print all tags used 1652810Srdreslin@umich.edu */ 1662810Srdreslin@umich.edu virtual std::string print() const = 0; 16710815Sdavid.guillen@arm.com}; 1682810Srdreslin@umich.edu 1699214Slena@cs.wisc.educlass BaseTagsCallback : public Callback 1709214Slena@cs.wisc.edu{ 1712810Srdreslin@umich.edu BaseTags *tags; 1722810Srdreslin@umich.edu public: 17310815Sdavid.guillen@arm.com BaseTagsCallback(BaseTags *t) : tags(t) {} 17411870Snikos.nikoleris@arm.com virtual void process() { tags->cleanupRefs(); }; 17510815Sdavid.guillen@arm.com}; 17611870Snikos.nikoleris@arm.com 17710815Sdavid.guillen@arm.com#endif //__BASE_TAGS_HH__ 17810815Sdavid.guillen@arm.com