base.hh revision 9663
12810SN/A/* 29347SAndreas.Sandberg@arm.com * Copyright (c) 2012 ARM Limited 39347SAndreas.Sandberg@arm.com * All rights reserved. 49347SAndreas.Sandberg@arm.com * 59347SAndreas.Sandberg@arm.com * The license below extends only to copyright in the software and shall 69347SAndreas.Sandberg@arm.com * not be construed as granting a license to any other intellectual 79347SAndreas.Sandberg@arm.com * property including but not limited to intellectual property relating 89347SAndreas.Sandberg@arm.com * to a hardware implementation of the functionality of the software 99347SAndreas.Sandberg@arm.com * licensed hereunder. You may use the software subject to the license 109347SAndreas.Sandberg@arm.com * terms below provided that you ensure that this notice is replicated 119347SAndreas.Sandberg@arm.com * unmodified and in its entirety in all distributions of the software, 129347SAndreas.Sandberg@arm.com * modified or unmodified, in source code or in binary form. 139347SAndreas.Sandberg@arm.com * 142810SN/A * Copyright (c) 2003-2005 The Regents of The University of Michigan 152810SN/A * All rights reserved. 162810SN/A * 172810SN/A * Redistribution and use in source and binary forms, with or without 182810SN/A * modification, are permitted provided that the following conditions are 192810SN/A * met: redistributions of source code must retain the above copyright 202810SN/A * notice, this list of conditions and the following disclaimer; 212810SN/A * redistributions in binary form must reproduce the above copyright 222810SN/A * notice, this list of conditions and the following disclaimer in the 232810SN/A * documentation and/or other materials provided with the distribution; 242810SN/A * neither the name of the copyright holders nor the names of its 252810SN/A * contributors may be used to endorse or promote products derived from 262810SN/A * this software without specific prior written permission. 272810SN/A * 282810SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 292810SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 302810SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 312810SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 322810SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 332810SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 342810SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 352810SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 362810SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 372810SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 382810SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 392810SN/A * 402810SN/A * Authors: Erik Hallnor 412810SN/A * Ron Dreslinski 422810SN/A */ 432810SN/A 442810SN/A/** 452810SN/A * @file 462810SN/A * Declaration of a common base class for cache tagstore objects. 472810SN/A */ 482810SN/A 492810SN/A#ifndef __BASE_TAGS_HH__ 502810SN/A#define __BASE_TAGS_HH__ 512810SN/A 522810SN/A#include <string> 538229Snate@binkert.org 548229Snate@binkert.org#include "base/callback.hh" 552810SN/A#include "base/statistics.hh" 562810SN/A 572810SN/Aclass BaseCache; 582810SN/A 592810SN/A/** 602810SN/A * A common base class of Cache tagstore objects. 612810SN/A */ 622810SN/Aclass BaseTags 632810SN/A{ 642810SN/A protected: 652810SN/A /** Pointer to the parent cache. */ 662810SN/A BaseCache *cache; 672810SN/A 682810SN/A /** Local copy of the parent cache name. Used for DPRINTF. */ 692810SN/A std::string objName; 702810SN/A 712810SN/A /** 722810SN/A * The number of tags that need to be touched to meet the warmup 732810SN/A * percentage. 742810SN/A */ 752810SN/A int warmupBound; 762810SN/A /** Marked true when the cache is warmed up. */ 772810SN/A bool warmedUp; 782810SN/A 796978SLisa.Hsu@amd.com /** the number of blocks in the cache */ 806978SLisa.Hsu@amd.com unsigned numBlocks; 816978SLisa.Hsu@amd.com 822810SN/A // Statistics 832810SN/A /** 842810SN/A * @addtogroup CacheStatistics 852810SN/A * @{ 862810SN/A */ 872810SN/A 882810SN/A /** Number of replacements of valid blocks per thread. */ 895999Snate@binkert.org Stats::Vector replacements; 902810SN/A /** Per cycle average of the number of tags that hold valid data. */ 915999Snate@binkert.org Stats::Average tagsInUse; 922810SN/A 932810SN/A /** The total number of references to a block before it is replaced. */ 945999Snate@binkert.org Stats::Scalar totalRefs; 952810SN/A 962810SN/A /** 972810SN/A * The number of reference counts sampled. This is different from 982810SN/A * replacements because we sample all the valid blocks when the simulator 992810SN/A * exits. 1002810SN/A */ 1015999Snate@binkert.org Stats::Scalar sampledRefs; 1022810SN/A 1032810SN/A /** 1042810SN/A * Average number of references to a block before is was replaced. 1052810SN/A * @todo This should change to an average stat once we have them. 1062810SN/A */ 1072810SN/A Stats::Formula avgRefs; 1082810SN/A 1092810SN/A /** The cycle that the warmup percentage was hit. */ 1105999Snate@binkert.org Stats::Scalar warmupCycle; 1116978SLisa.Hsu@amd.com 1128833Sdam.sunwoo@arm.com /** Average occupancy of each requestor using the cache */ 1136978SLisa.Hsu@amd.com Stats::AverageVector occupancies; 1146978SLisa.Hsu@amd.com 1158833Sdam.sunwoo@arm.com /** Average occ % of each requestor using the cache */ 1166978SLisa.Hsu@amd.com Stats::Formula avgOccs; 1176978SLisa.Hsu@amd.com 1182810SN/A /** 1192810SN/A * @} 1202810SN/A */ 1212810SN/A 1222810SN/A public: 1232810SN/A 1242810SN/A /** 1252810SN/A * Destructor. 1262810SN/A */ 1272810SN/A virtual ~BaseTags() {} 1282810SN/A 1292810SN/A /** 1302810SN/A * Set the parent cache back pointer. Also copies the cache name to 1312810SN/A * objName. 1322810SN/A * @param _cache Pointer to parent cache. 1332810SN/A */ 1342810SN/A void setCache(BaseCache *_cache); 1352810SN/A 1362810SN/A /** 1372810SN/A * Return the parent cache name. 1382810SN/A * @return the parent cache name. 1392810SN/A */ 1402810SN/A const std::string &name() const 1412810SN/A { 1422810SN/A return objName; 1432810SN/A } 1442810SN/A 1452810SN/A /** 1462810SN/A * Register local statistics. 1472810SN/A * @param name The name to preceed each statistic name. 1482810SN/A */ 1492810SN/A void regStats(const std::string &name); 1502810SN/A 1512810SN/A /** 1522810SN/A * Average in the reference count for valid blocks when the simulation 1532810SN/A * exits. 1542810SN/A */ 1552810SN/A virtual void cleanupRefs() {} 1567612SGene.Wu@arm.com 1577612SGene.Wu@arm.com /** 1587612SGene.Wu@arm.com *iterated through all blocks and clear all locks 1597612SGene.Wu@arm.com *Needed to clear all lock tracking at once 1607612SGene.Wu@arm.com */ 1617612SGene.Wu@arm.com virtual void clearLocks() {} 1629663Suri.wiener@arm.com 1639663Suri.wiener@arm.com /** 1649663Suri.wiener@arm.com * Print all tags used 1659663Suri.wiener@arm.com */ 1669663Suri.wiener@arm.com virtual std::string print() const = 0; 1672810SN/A}; 1682810SN/A 1692810SN/Aclass BaseTagsCallback : public Callback 1702810SN/A{ 1712810SN/A BaseTags *tags; 1722810SN/A public: 1732810SN/A BaseTagsCallback(BaseTags *t) : tags(t) {} 1742810SN/A virtual void process() { tags->cleanupRefs(); }; 1752810SN/A}; 1762810SN/A 1772810SN/A#endif //__BASE_TAGS_HH__ 178